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From: "Radim Krčmář" <rkrcmar@redhat.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	yang zhang wz <yang.zhang.wz@gmail.com>,
	feng wu <feng.wu@intel.com>,
	mst@redhat.com
Subject: Re: [RFC PATCH 0/3] kvm: x86: speedups for APICv
Date: Fri, 30 Sep 2016 15:23:04 +0200	[thread overview]
Message-ID: <20160930132304.GF13257@potion> (raw)
In-Reply-To: <1865155490.553427.1475185306049.JavaMail.zimbra@redhat.com>

2016-09-29 17:41-0400, Paolo Bonzini:
>> Another possible optimization: when delivering an IPI, don't write the
>> vector to PIR, but directly to VIRR.  If the guest is not in VMX
>> non-root mode, then vm entry will take care of the injection; in the
>> other case, we'll send POSTED_INTR_VECTOR.
>> It seems that we don't even have to set PI.ON -- SDM doesn't say it is
>> necessary to evaluate pending virtual interrupts after receiving the
>> notification interrupt.  If we have to set PI.ON, we can just skip the
>> PIR->VIRR sync as long as the VM doesn't have an assigned device,
>> because we know that PIR is empty.
> 
> Nope, you cannot write to the APIC page while the VM is running.

True, thanks.

> (We're already reading the manual in such a way as to "allow" us to
> write TMR while the VM is running, but that should not be extended.
> For example the SDM doesn't say that the processor accesses VIRR with
> atomic instructions, in fact it probably doesn't).

Yeah, TMR is not used by the hardware ...

  reply	other threads:[~2016-09-30 13:23 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-27 21:20 [RFC PATCH 0/3] kvm: x86: speedups for APICv Paolo Bonzini
2016-09-27 21:20 ` [PATCH 1/3] kvm: x86: avoid atomic operations on APICv vmentry Paolo Bonzini
2016-09-27 21:20 ` [PATCH 2/3] kvm: x86: do not use KVM_REQ_EVENT for APICv interrupt injection Paolo Bonzini
2016-09-27 23:07   ` Michael S. Tsirkin
2016-09-28  8:21     ` Paolo Bonzini
2016-09-28 11:40       ` Wu, Feng
2016-09-28 11:50         ` Paolo Bonzini
2016-09-28 12:06           ` Wu, Feng
2016-09-28 12:14             ` Paolo Bonzini
2016-10-14  7:37           ` Yang Zhang
2016-10-14  8:12             ` Paolo Bonzini
2016-09-28 13:46       ` Michael S. Tsirkin
2016-09-28 14:08         ` Paolo Bonzini
2016-09-28 10:04   ` Wu, Feng
2016-09-28 10:16     ` Paolo Bonzini
2016-09-28 11:53       ` Wu, Feng
2016-09-28 11:55         ` Paolo Bonzini
2016-09-28 12:07           ` Wu, Feng
2016-10-14  7:12   ` Yang Zhang
2016-09-27 21:20 ` [PATCH 3/3] KVM: x86: do not scan IRR twice on APICv vmentry Paolo Bonzini
2016-09-28 14:00   ` Michael S. Tsirkin
2016-09-28 14:44     ` Paolo Bonzini
2016-09-29  2:51   ` Wu, Feng
2016-10-14  7:32   ` Yang Zhang
2016-10-14  7:45     ` Paolo Bonzini
2016-09-29 19:55 ` [RFC PATCH 0/3] kvm: x86: speedups for APICv Radim Krčmář
2016-09-29 21:41   ` Paolo Bonzini
2016-09-30 13:23     ` Radim Krčmář [this message]
2016-09-30 13:33     ` Radim Krčmář

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