Re: [PATCH v2 0/3] nVMX: Emulated Page Modification Logging for Nested Virtualization

Paolo Bonzini
2017-05-09T15:22:22Z

On 05/05/2017 21:25, Bandan Das wrote:
> v2:
> 2/3: Clear out all bits except bit 12
> 3/3: Slightly modify an existing comment, honor L0's
> PML setting when clearing it for L1
>
> v1:
> http://www.spinics.net/lists/kvm/msg149247.html
>
> These patches implement PML on top of EPT A/D emulation
> (ae1e2d1082ae).
>
> When dirty bit is being set, we write the gpa to the
> buffer provided by L1. If the index overflows, we just
> change the exit reason before running L1.

I tested this with api/dirty-log-perf, and nested PML is more than 3
times faster than pml=0. I want to do a few more tests because I don't
see any PML full exits in the L1 trace, but it seems to be a nice
improvement!

Paolo

> Bandan Das (3):
> kvm: x86: Add a hook for arch specific dirty logging emulation
> nVMX: Implement emulated Page Modification Logging
> nVMX: Advertise PML to L1 hypervisor
>
> arch/x86/include/asm/kvm_host.h | 2 +
> arch/x86/kvm/mmu.c | 15 +++++++
> arch/x86/kvm/mmu.h | 1 +
> arch/x86/kvm/paging_tmpl.h | 4 ++
> arch/x86/kvm/vmx.c | 97 ++++++++++++++++++++++++++++++++++++++---
> 5 files changed, 112 insertions(+), 7 deletions(-)
>