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From: Peter Xu <peterx@redhat.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	Longpeng <longpeng2@huawei.com>,
	Huangweidong <weidong.huang@huawei.com>,
	Gonglei <arei.gonglei@huawei.com>,
	wangxin <wangxinxin.wang@huawei.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>
Subject: Re: [PATCH 2/4] KVM: VMX: avoid double list add with VT-d posted interrupts
Date: Fri, 9 Jun 2017 10:50:44 +0800	[thread overview]
Message-ID: <20170609025044.GH3628@pxdev.xzpeter.org> (raw)
In-Reply-To: <5cfad7aa-9069-5419-b0b3-41df74a4f551@redhat.com>

On Thu, Jun 08, 2017 at 01:24:44PM +0200, Paolo Bonzini wrote:
> 
> 
> On 08/06/2017 11:16, Peter Xu wrote:
> >> Oh, I see what you mean: set up the wakeup handler in vmx_vcpu_pi_put
> >> and rely on PI.ON to wake up the sleeping process immediately.  That
> >> should be feasible, but overall I like the current pre_block/post_block
> >> structure, and I think it's simpler.  The only thing to be careful about
> >> is leaving the IRTE unmodified when scheduling out a blocked VCPU, which
> >> is cleaned up and simplified in patch 3.
> >>
> >> So I understand that the state may seem a bit too complicated as
> >> of this patch, but hopefully the next two make it clearer.
> > After re-read the codes and patches I got the point. Indeed current
> > way should be clearer since pre/post_block are mostly handling NV/DST
> > while pi_load/put are for SN bit.  Thanks!
> 
> Almost: pi_load handles NDST too.  However, I think with patch 3 it's
> clearer how pi_load handles the nesting inside pre_block...post_block.

Yes. The old codes & comments for vmx_vcpu_pi_load() are not very easy
to understand for me.

For patch 3, not sure whether moving clear_sn() upper would be
clearer:

pi_load()
{
  if (!pi_test_bit() && vcpu->cpu == cpu)
    return;

  /* Unconditionally clear SN */
  pi_clear_sn();

  /*
   * If cpu not changed, no need to switch PDST; if WAKEUP, post_block
   * will do it for us
   */
  if (vcpu->cpu == cpu || nv == WAKEUP)
    return;

  /*
   * Update PDST. Possibly the vcpu thread switched from one cpu to
   * another.
   */
  do {
    ...
  } while (...)
}

Even, I'm thinking whether we can unconditionally setup PDST only in
pi_load(), then post_block() only needs to handle the NV bit.

(PS. since I'm at here... could I ask why in pi_pre_block we need to
 udpate PDST as well? I guess that decides who will run the
 wakeup_handler code to kick the vcpu thread, but would that really
 matter?)

Thanks,

-- 
Peter Xu

  reply	other threads:[~2017-06-09  2:50 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-06 10:57 [PATCH CFT 0/4] VT-d PI fixes Paolo Bonzini
2017-06-06 10:57 ` [PATCH 1/4] KVM: VMX: extract __pi_post_block Paolo Bonzini
2017-06-06 21:27   ` kbuild test robot
2017-06-06 10:57 ` [PATCH 2/4] KVM: VMX: avoid double list add with VT-d posted interrupts Paolo Bonzini
2017-06-06 12:30   ` Longpeng (Mike)
2017-06-06 12:35     ` Paolo Bonzini
2017-06-06 12:45       ` Longpeng (Mike)
2017-06-06 21:49   ` kbuild test robot
2017-06-08  6:50   ` Peter Xu
2017-06-08  6:53     ` Peter Xu
2017-06-08  7:00     ` Paolo Bonzini
2017-06-08  9:16       ` Peter Xu
2017-06-08 11:24         ` Paolo Bonzini
2017-06-09  2:50           ` Peter Xu [this message]
2017-06-09  7:29             ` Paolo Bonzini
2017-06-09  7:41               ` Peter Xu
2017-07-28  2:31   ` Longpeng (Mike)
2017-07-28  6:28     ` Paolo Bonzini
2017-06-06 10:57 ` [PATCH 3/4] KVM: VMX: simplify and fix vmx_vcpu_pi_load Paolo Bonzini
2017-07-28  4:22   ` Longpeng (Mike)
2017-07-28  5:14     ` Longpeng (Mike)
2017-06-06 10:57 ` [PATCH 4/4] KVM: VMX: simplify cmpxchg of PI descriptor control field Paolo Bonzini
2017-06-07  9:33 ` [PATCH CFT 0/4] VT-d PI fixes Gonglei (Arei)
2017-06-07 14:32   ` Paolo Bonzini
2017-07-11  8:55   ` Paolo Bonzini
2017-07-11  9:16     ` Gonglei (Arei)
2017-09-21  8:23       ` Longpeng (Mike)
2017-09-21  9:42         ` Paolo Bonzini

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