From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Xu Subject: Re: [PATCH 2/4] KVM: VMX: avoid double list add with VT-d posted interrupts Date: Fri, 9 Jun 2017 10:50:44 +0800 Message-ID: <20170609025044.GH3628@pxdev.xzpeter.org> References: <20170606105707.23207-1-pbonzini@redhat.com> <20170606105707.23207-3-pbonzini@redhat.com> <20170608065057.GB3628@pxdev.xzpeter.org> <463359347.7021259.1496905239878.JavaMail.zimbra@redhat.com> <20170608091644.GD3628@pxdev.xzpeter.org> <5cfad7aa-9069-5419-b0b3-41df74a4f551@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Longpeng , Huangweidong , Gonglei , wangxin , Radim =?utf-8?B?S3LEjW3DocWZ?= To: Paolo Bonzini Return-path: Content-Disposition: inline In-Reply-To: <5cfad7aa-9069-5419-b0b3-41df74a4f551@redhat.com> Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On Thu, Jun 08, 2017 at 01:24:44PM +0200, Paolo Bonzini wrote: > > > On 08/06/2017 11:16, Peter Xu wrote: > >> Oh, I see what you mean: set up the wakeup handler in vmx_vcpu_pi_put > >> and rely on PI.ON to wake up the sleeping process immediately. That > >> should be feasible, but overall I like the current pre_block/post_block > >> structure, and I think it's simpler. The only thing to be careful about > >> is leaving the IRTE unmodified when scheduling out a blocked VCPU, which > >> is cleaned up and simplified in patch 3. > >> > >> So I understand that the state may seem a bit too complicated as > >> of this patch, but hopefully the next two make it clearer. > > After re-read the codes and patches I got the point. Indeed current > > way should be clearer since pre/post_block are mostly handling NV/DST > > while pi_load/put are for SN bit. Thanks! > > Almost: pi_load handles NDST too. However, I think with patch 3 it's > clearer how pi_load handles the nesting inside pre_block...post_block. Yes. The old codes & comments for vmx_vcpu_pi_load() are not very easy to understand for me. For patch 3, not sure whether moving clear_sn() upper would be clearer: pi_load() { if (!pi_test_bit() && vcpu->cpu == cpu) return; /* Unconditionally clear SN */ pi_clear_sn(); /* * If cpu not changed, no need to switch PDST; if WAKEUP, post_block * will do it for us */ if (vcpu->cpu == cpu || nv == WAKEUP) return; /* * Update PDST. Possibly the vcpu thread switched from one cpu to * another. */ do { ... } while (...) } Even, I'm thinking whether we can unconditionally setup PDST only in pi_load(), then post_block() only needs to handle the NV bit. (PS. since I'm at here... could I ask why in pi_pre_block we need to udpate PDST as well? I guess that decides who will run the wakeup_handler code to kick the vcpu thread, but would that really matter?) Thanks, -- Peter Xu