From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Hildenbrand Subject: [kvm-unit-tests PATCH v1] s390x: add stidp interception test Date: Thu, 22 Jun 2017 09:55:50 +0200 Message-ID: <20170622075550.5307-1-david@redhat.com> Cc: Paolo Bonzini , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= , Thomas Huth , david@redhat.com To: kvm@vger.kernel.org Return-path: Received: from mx1.redhat.com ([209.132.183.28]:60746 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751116AbdFVHzz (ORCPT ); Thu, 22 Jun 2017 03:55:55 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3C5A57F40C for ; Thu, 22 Jun 2017 07:55:55 +0000 (UTC) Sender: kvm-owner@vger.kernel.org List-ID: Let's add a test case for the STORE CPU ID instruction. Signed-off-by: David Hildenbrand --- lib/s390x/asm/arch_def.h | 8 ++++++++ s390x/intercept.c | 26 ++++++++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/lib/s390x/asm/arch_def.h b/lib/s390x/asm/arch_def.h index 07d467e..72e5c60 100644 --- a/lib/s390x/asm/arch_def.h +++ b/lib/s390x/asm/arch_def.h @@ -143,4 +143,12 @@ struct lowcore { #define PGM_INT_CODE_CRYPTO_OPERATION 0x119 #define PGM_INT_CODE_TX_ABORTED_EVENT 0x200 +struct cpuid { + uint64_t version : 8; + uint64_t id : 24; + uint64_t type : 16; + uint64_t format : 1; + uint64_t reserved : 15; +}; + #endif diff --git a/s390x/intercept.c b/s390x/intercept.c index 4558860..9766289 100644 --- a/s390x/intercept.c +++ b/s390x/intercept.c @@ -105,6 +105,31 @@ static void test_stap(void) check_pgm_int_code(PGM_INT_CODE_ADDRESSING); } +/* Test the STORE CPU ID instruction */ +static void test_stidp(void) +{ + struct cpuid id = {}; + + asm volatile ("stidp %0\n" : "+Q"(id)); + report("type set", id.type); + report("version valid", !id.version || id.version == 0xff); + report("reserved bits not set", !id.reserved); + + expect_pgm_int(); + low_prot_enable(); + asm volatile ("stidp 0(%0)\n" : : "r"(8)); + low_prot_disable(); + check_pgm_int_code(PGM_INT_CODE_PROTECTION); + + expect_pgm_int(); + asm volatile ("stidp 0(%0)\n" : : "r"(1)); + check_pgm_int_code(PGM_INT_CODE_SPECIFICATION); + + expect_pgm_int(); + asm volatile ("stidp 0(%0)\n" : : "r"(-8)); + check_pgm_int_code(PGM_INT_CODE_ADDRESSING); +} + /* Test the TEST BLOCK instruction */ static void test_testblock(void) { @@ -152,6 +177,7 @@ struct { { "stpx", test_stpx, false }, { "spx", test_spx, false }, { "stap", test_stap, false }, + { "stidp", test_stidp, false }, { "testblock", test_testblock, false }, { NULL, NULL, false } }; -- 2.9.4