From mboxrd@z Thu Jan 1 00:00:00 1970 From: Radim =?utf-8?B?S3LEjW3DocWZ?= Subject: Re: [PATCH] KVM: hyperv: support HV_X64_MSR_TSC_FREQUENCY and HV_X64_MSR_APIC_FREQUENCY Date: Mon, 24 Jul 2017 16:23:44 +0200 Message-ID: <20170724142343.GA14941@potion> References: <20170717132847.29892-1-lprosek@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: kvm@vger.kernel.org To: Ladi Prosek Return-path: Received: from mx1.redhat.com ([209.132.183.28]:33760 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932079AbdGXOXq (ORCPT ); Mon, 24 Jul 2017 10:23:46 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9D34E7F6A2 for ; Mon, 24 Jul 2017 14:23:46 +0000 (UTC) Content-Disposition: inline In-Reply-To: <20170717132847.29892-1-lprosek@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: I missed this patch last week, sorry. 2017-07-17 15:28+0200, Ladi Prosek: > It has been experimentally confirmed that supporting these two MSRs is one > of the necessary conditions for nested Hyper-V to use the TSC page. Modern > Windows guests are noticeably slower when they fall back to reading > timestamps from the HV_X64_MSR_TIME_REF_COUNT MSR instead of using the TSC > page. > > The newly supported MSRs are advertised with the AccessFrequencyRegs > partition privilege flag and CPUID.40000003H:EDX[8] "Support for > determining timer frequencies is available" (both outside of the scope of > this KVM patch). Do Windows ignore the AccessFrequencyMsrs (CPUID.40000003H:EAX[11]) bit? > Hypervisor Top Level Functional Specification version 5.0b does not > explicitly mark these MSRs as partition wide. This is, however, implied by > the way Windows uses them (one read on Hyper-V startup regardless of the > number of VCPUs) as well as our implementation. > > Signed-off-by: Ladi Prosek > --- > diff --git a/arch/x86/kvm/hyperv.c b/arch/x86/kvm/hyperv.c > @@ -1065,6 +1067,12 @@ static int kvm_hv_get_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) > case HV_X64_MSR_REFERENCE_TSC: > data = hv->hv_tsc_page; > break; > + case HV_X64_MSR_TSC_FREQUENCY: > + data = (u64)tsc_khz * 1000; > + break; This should be based on vcpu->arch.virtual_tsc_khz, because KVM can use guest TSC scaling, thanks. > + case HV_X64_MSR_APIC_FREQUENCY: > + data = APIC_BUS_FREQUENCY; > + break; > case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4: > return kvm_hv_msr_get_crash_data(vcpu, > msr - HV_X64_MSR_CRASH_P0,