* [PATCH v2] KVM: hyperv: support HV_X64_MSR_TSC_FREQUENCY and HV_X64_MSR_APIC_FREQUENCY
@ 2017-07-26 11:32 Ladi Prosek
2017-07-26 12:49 ` Radim Krčmář
2017-07-27 14:23 ` Paolo Bonzini
0 siblings, 2 replies; 3+ messages in thread
From: Ladi Prosek @ 2017-07-26 11:32 UTC (permalink / raw)
To: kvm; +Cc: rkrcmar, pbonzini
It has been experimentally confirmed that supporting these two MSRs is one
of the necessary conditions for nested Hyper-V to use the TSC page. Modern
Windows guests are noticeably slower when they fall back to reading
timestamps from the HV_X64_MSR_TIME_REF_COUNT MSR instead of using the TSC
page.
The newly supported MSRs are advertised with the AccessFrequencyRegs
partition privilege flag and CPUID.40000003H:EDX[8] "Support for
determining timer frequencies is available" (both outside of the scope of
this KVM patch).
Signed-off-by: Ladi Prosek <lprosek@redhat.com>
---
v1->v2:
* HV_X64_MSR_TSC_FREQUENCY now based on vcpu->arch.virtual_tsc_khz (Radim)
* Removed both MSRs from the partition-wide list as the implementation is
no longer vcpu agnostic
arch/x86/kvm/hyperv.c | 6 ++++++
arch/x86/kvm/lapic.c | 2 --
arch/x86/kvm/lapic.h | 3 +++
arch/x86/kvm/x86.c | 1 +
4 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kvm/hyperv.c b/arch/x86/kvm/hyperv.c
index 1572c35..469746f 100644
--- a/arch/x86/kvm/hyperv.c
+++ b/arch/x86/kvm/hyperv.c
@@ -1135,6 +1135,12 @@ static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
return stimer_get_count(vcpu_to_stimer(vcpu, timer_index),
pdata);
}
+ case HV_X64_MSR_TSC_FREQUENCY:
+ data = (u64)vcpu->arch.virtual_tsc_khz * 1000;
+ break;
+ case HV_X64_MSR_APIC_FREQUENCY:
+ data = APIC_BUS_FREQUENCY;
+ break;
default:
vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
return 1;
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 2f6ef51..6e121dd 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -54,8 +54,6 @@
#define PRIu64 "u"
#define PRIo64 "o"
-#define APIC_BUS_CYCLE_NS 1
-
/* #define apic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg) */
#define apic_debug(fmt, arg...)
diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index ff8039d..288a8a8 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -12,6 +12,9 @@
#define KVM_APIC_SHORT_MASK 0xc0000
#define KVM_APIC_DEST_MASK 0x800
+#define APIC_BUS_CYCLE_NS 1
+#define APIC_BUS_FREQUENCY (1000000000ULL / APIC_BUS_CYCLE_NS)
+
struct kvm_timer {
struct hrtimer timer;
s64 period; /* unit: ns */
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index b3b212f..350e432 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -986,6 +986,7 @@ static u32 emulated_msrs[] = {
MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
+ HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
HV_X64_MSR_RESET,
--
2.9.3
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH v2] KVM: hyperv: support HV_X64_MSR_TSC_FREQUENCY and HV_X64_MSR_APIC_FREQUENCY
2017-07-26 11:32 [PATCH v2] KVM: hyperv: support HV_X64_MSR_TSC_FREQUENCY and HV_X64_MSR_APIC_FREQUENCY Ladi Prosek
@ 2017-07-26 12:49 ` Radim Krčmář
2017-07-27 14:23 ` Paolo Bonzini
1 sibling, 0 replies; 3+ messages in thread
From: Radim Krčmář @ 2017-07-26 12:49 UTC (permalink / raw)
To: Ladi Prosek; +Cc: kvm, pbonzini
2017-07-26 13:32+0200, Ladi Prosek:
> It has been experimentally confirmed that supporting these two MSRs is one
> of the necessary conditions for nested Hyper-V to use the TSC page. Modern
> Windows guests are noticeably slower when they fall back to reading
> timestamps from the HV_X64_MSR_TIME_REF_COUNT MSR instead of using the TSC
> page.
>
> The newly supported MSRs are advertised with the AccessFrequencyRegs
> partition privilege flag and CPUID.40000003H:EDX[8] "Support for
> determining timer frequencies is available" (both outside of the scope of
> this KVM patch).
> Signed-off-by: Ladi Prosek <lprosek@redhat.com>
> ---
>
> v1->v2:
> * HV_X64_MSR_TSC_FREQUENCY now based on vcpu->arch.virtual_tsc_khz (Radim)
> * Removed both MSRs from the partition-wide list as the implementation is
> no longer vcpu agnostic
I like that we don't have to add a capability to expose this feature to
the userspace,
Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2] KVM: hyperv: support HV_X64_MSR_TSC_FREQUENCY and HV_X64_MSR_APIC_FREQUENCY
2017-07-26 11:32 [PATCH v2] KVM: hyperv: support HV_X64_MSR_TSC_FREQUENCY and HV_X64_MSR_APIC_FREQUENCY Ladi Prosek
2017-07-26 12:49 ` Radim Krčmář
@ 2017-07-27 14:23 ` Paolo Bonzini
1 sibling, 0 replies; 3+ messages in thread
From: Paolo Bonzini @ 2017-07-27 14:23 UTC (permalink / raw)
To: Ladi Prosek, kvm; +Cc: rkrcmar
On 26/07/2017 13:32, Ladi Prosek wrote:
> It has been experimentally confirmed that supporting these two MSRs is one
> of the necessary conditions for nested Hyper-V to use the TSC page. Modern
> Windows guests are noticeably slower when they fall back to reading
> timestamps from the HV_X64_MSR_TIME_REF_COUNT MSR instead of using the TSC
> page.
>
> The newly supported MSRs are advertised with the AccessFrequencyRegs
> partition privilege flag and CPUID.40000003H:EDX[8] "Support for
> determining timer frequencies is available" (both outside of the scope of
> this KVM patch).
>
> Signed-off-by: Ladi Prosek <lprosek@redhat.com>
> ---
>
> v1->v2:
> * HV_X64_MSR_TSC_FREQUENCY now based on vcpu->arch.virtual_tsc_khz (Radim)
> * Removed both MSRs from the partition-wide list as the implementation is
> no longer vcpu agnostic
>
>
> arch/x86/kvm/hyperv.c | 6 ++++++
> arch/x86/kvm/lapic.c | 2 --
> arch/x86/kvm/lapic.h | 3 +++
> arch/x86/kvm/x86.c | 1 +
> 4 files changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/kvm/hyperv.c b/arch/x86/kvm/hyperv.c
> index 1572c35..469746f 100644
> --- a/arch/x86/kvm/hyperv.c
> +++ b/arch/x86/kvm/hyperv.c
> @@ -1135,6 +1135,12 @@ static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
> return stimer_get_count(vcpu_to_stimer(vcpu, timer_index),
> pdata);
> }
> + case HV_X64_MSR_TSC_FREQUENCY:
> + data = (u64)vcpu->arch.virtual_tsc_khz * 1000;
> + break;
> + case HV_X64_MSR_APIC_FREQUENCY:
> + data = APIC_BUS_FREQUENCY;
> + break;
> default:
> vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
> return 1;
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index 2f6ef51..6e121dd 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -54,8 +54,6 @@
> #define PRIu64 "u"
> #define PRIo64 "o"
>
> -#define APIC_BUS_CYCLE_NS 1
> -
> /* #define apic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg) */
> #define apic_debug(fmt, arg...)
>
> diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
> index ff8039d..288a8a8 100644
> --- a/arch/x86/kvm/lapic.h
> +++ b/arch/x86/kvm/lapic.h
> @@ -12,6 +12,9 @@
> #define KVM_APIC_SHORT_MASK 0xc0000
> #define KVM_APIC_DEST_MASK 0x800
>
> +#define APIC_BUS_CYCLE_NS 1
> +#define APIC_BUS_FREQUENCY (1000000000ULL / APIC_BUS_CYCLE_NS)
> +
> struct kvm_timer {
> struct hrtimer timer;
> s64 period; /* unit: ns */
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index b3b212f..350e432 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -986,6 +986,7 @@ static u32 emulated_msrs[] = {
> MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
> HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
> HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
> + HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
> HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
> HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
> HV_X64_MSR_RESET,
>
Applied to kvm/queue, thanks.
Paolo
^ permalink raw reply [flat|nested] 3+ messages in thread
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2017-07-26 11:32 [PATCH v2] KVM: hyperv: support HV_X64_MSR_TSC_FREQUENCY and HV_X64_MSR_APIC_FREQUENCY Ladi Prosek
2017-07-26 12:49 ` Radim Krčmář
2017-07-27 14:23 ` Paolo Bonzini
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