From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Jones Subject: [PATCH] vfio/pci: Fix version2 RC endpoint PCIe capability size Date: Fri, 11 Aug 2017 12:03:35 +0200 Message-ID: <20170811100335.22716-1-drjones@redhat.com> Cc: alex.williamson@redhat.com, eric.auger@redhat.com To: kvm@vger.kernel.org Return-path: Received: from mx1.redhat.com ([209.132.183.28]:36430 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752704AbdHKKDl (ORCPT ); Fri, 11 Aug 2017 06:03:41 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 830578EB47 for ; Fri, 11 Aug 2017 10:03:41 +0000 (UTC) Sender: kvm-owner@vger.kernel.org List-ID: Fix a typo which resulted in returning the same value for the length of version 2 root complex integrated endpoints as other version 2 devices, even though RC's don't have a link. Signed-off-by: Andrew Jones --- The issue was only found by review, so I've only compile-tested the fix. Actually, TBH, I don't know anything about PCI or RC config space, so I'm just assuming link-size-v2 == link-size-v1 and that link-size-v1 is 8, since the code was using 0xc == PCI_CAP_EXP_ENDPOINT_SIZEOF_V1 - 8 for it. drivers/vfio/pci/vfio_pci_config.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_config.c b/drivers/vfio/pci/vfio_pci_config.c index 5628fe114347..afe29cd88f1f 100644 --- a/drivers/vfio/pci/vfio_pci_config.c +++ b/drivers/vfio/pci/vfio_pci_config.c @@ -1244,15 +1244,15 @@ static int vfio_cap_len(struct vfio_pci_device *vdev, u8 cap, u8 pos) } /* length based on version and type */ - if ((pcie_caps_reg(pdev) & PCI_EXP_FLAGS_VERS) == 1) { - if (pci_pcie_type(pdev) == PCI_EXP_TYPE_RC_END) - return 0xc; /* "All Devices" only, no link */ - return PCI_CAP_EXP_ENDPOINT_SIZEOF_V1; - } else { - if (pci_pcie_type(pdev) == PCI_EXP_TYPE_RC_END) - return 0x2c; /* No link */ - return PCI_CAP_EXP_ENDPOINT_SIZEOF_V2; - } + if ((pcie_caps_reg(pdev) & PCI_EXP_FLAGS_VERS) == 1) + ret = PCI_CAP_EXP_ENDPOINT_SIZEOF_V1; + else + ret = PCI_CAP_EXP_ENDPOINT_SIZEOF_V2; + + if (pci_pcie_type(pdev) == PCI_EXP_TYPE_RC_END) + ret -= 8; /* "All Devices" only, no link */ + + return ret; case PCI_CAP_ID_HT: ret = pci_read_config_byte(pdev, pos + 3, &byte); if (ret) -- 2.13.4