From mboxrd@z Thu Jan 1 00:00:00 1970 From: Brijesh Singh Subject: [Part1 PATCH v5.1 06/17] x86/mm: Include SEV for encryption memory attribute changes Date: Wed, 27 Sep 2017 14:17:02 -0500 Message-ID: <20170927191702.72075-1-brijesh.singh@amd.com> References: <20170927151329.70011-7-brijesh.singh@amd.com> Mime-Version: 1.0 Content-Type: text/plain Cc: Tom Lendacky , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , Borislav Petkov , Andy Lutomirski , John Ogness , Matt Fleming , Laura Abbott , Dan Williams , "Kirill A. Shutemov" , Brijesh Singh To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org Return-path: In-Reply-To: <20170927151329.70011-7-brijesh.singh@amd.com> Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org From: Tom Lendacky The current code checks only for sme_active() when determining whether to perform the encryption attribute change. Include sev_active() in this check so that memory attribute changes can occur under SME and SEV. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: "H. Peter Anvin" Cc: Borislav Petkov Cc: Andy Lutomirski Cc: John Ogness Cc: Matt Fleming Cc: Laura Abbott Cc: Dan Williams Cc: "Kirill A. Shutemov" Cc: linux-kernel@vger.kernel.org Cc: x86@kernel.org Signed-off-by: Tom Lendacky Signed-off-by: Brijesh Singh Reviewed-by: Borislav Petkov --- arch/x86/mm/pageattr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index dfb7d657cf43..3fe68483463c 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c @@ -1781,8 +1781,8 @@ static int __set_memory_enc_dec(unsigned long addr, int numpages, bool enc) unsigned long start; int ret; - /* Nothing to do if the SME is not active */ - if (!sme_active()) + /* Nothing to do if memory encryption is not active */ + if (!mem_encrypt_active()) return 0; /* Should not be working on unaligned addresses */ -- 2.9.5