From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arbel Moshe Subject: [PATCH v2 3/3] KVM: nVMX: Fix nested APICv Secondary CPU Controls when apicv disabled Date: Wed, 22 Nov 2017 12:23:40 +0200 Message-ID: <20171122102340.7110-4-arbel.moshe@oracle.com> References: <20171122102340.7110-1-arbel.moshe@oracle.com> Cc: jmattson@google.com, wanpeng.li@hotmail.com, idan.brown@oracle.com, liran.alon@oracle.com, Arbel Moshe , Krish Sadhukhan To: pbonzini@redhat.com, rkrcmar@redhat.com, kvm@vger.kernel.org Return-path: Received: from aserp1040.oracle.com ([141.146.126.69]:48596 "EHLO aserp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753670AbdKVKYm (ORCPT ); Wed, 22 Nov 2017 05:24:42 -0500 In-Reply-To: <20171122102340.7110-1-arbel.moshe@oracle.com> Sender: kvm-owner@vger.kernel.org List-ID: Implementation of virtual APICv relies on L0 being able to use APICv. Therefore, if enable_apicv==false, we should not expose APICv to L1. This commit makes sure to not expose APICv Secondary CPU controls to L1 when enable_apicv==false. Signed-off-by: Arbel Moshe Reviewed-by: Liran Alon Reviewed-by: Krish Sadhukhan Signed-off-by: Krish Sadhukhan --- arch/x86/kvm/vmx.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 0450fbdb97be..a2f157e9c33c 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -2811,10 +2811,14 @@ static void nested_vmx_setup_ctls_msrs(struct vcpu_vmx *vmx) SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES | SECONDARY_EXEC_DESC | SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE | - SECONDARY_EXEC_APIC_REGISTER_VIRT | - SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY | SECONDARY_EXEC_WBINVD_EXITING; + if (kvm_vcpu_apicv_active(&vmx->vcpu)) { + vmx->nested.nested_vmx_secondary_ctls_high |= + (SECONDARY_EXEC_APIC_REGISTER_VIRT | + SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY); + } + if (enable_ept) { /* nested EPT: emulate EPT also to L1 */ vmx->nested.nested_vmx_secondary_ctls_high |= -- 2.14.1