From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andi Kleen Subject: Re: [PATCH RFC 2/2] KVM: x86/vPMU: ignore access to LBR-related MSRs Date: Wed, 6 Dec 2017 07:57:28 -0800 Message-ID: <20171206155728.GL3070@tassilo.jf.intel.com> References: <1512560585-27263-1-git-send-email-jan.dakinevich@virtuozzo.com> <1512560585-27263-3-git-send-email-jan.dakinevich@virtuozzo.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: linux-kernel@vger.kernel.org, "Denis V . Lunev" , Roman Kagan , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Thomas Gleixner , "H. Peter Anvin" , x86@kernel.org, Paolo Bonzini , Radim =?utf-8?B?S3LEjW3DocWZ?= , Kan Liang , Stephane Eranian , Colin King , Sebastian Andrzej Siewior , Jin Yao , kvm@vger.kernel.org To: Jan Dakinevich Return-path: Received: from mga01.intel.com ([192.55.52.88]:7019 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752270AbdLFP5a (ORCPT ); Wed, 6 Dec 2017 10:57:30 -0500 Content-Disposition: inline In-Reply-To: <1512560585-27263-3-git-send-email-jan.dakinevich@virtuozzo.com> Sender: kvm-owner@vger.kernel.org List-ID: If you do all this it's only a small step to fully enable LBRs for guests. Just need to allow them to be written, expose PERF_CAPABILITIES too, and start/stop them on entry/exit, and enable context switching through perf in the host. That would be far better than creating a frankenstate where LBR is there but mostly broken on some KVM versions. -Andi