From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jan Dakinevich <jan.dakinevich@virtuozzo.com>
Subject: Re: [PATCH RFC 0/2] ignore LBR-related MSRs
Date: Wed, 6 Dec 2017 19:39:46 +0300
Message-ID: <20171206193946.23e360cb@virtuozzo.com>
References: <1512560585-27263-1-git-send-email-jan.dakinevich@virtuozzo.com>
        <20171206150648.GF28074@char.us.oracle.com>
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: 7bit
Cc: linux-kernel@vger.kernel.org,
        "Denis V . Lunev" <den@virtuozzo.com>,
        Roman Kagan <rkagan@virtuozzo.com>,
        Peter Zijlstra <peterz@infradead.org>,
        Ingo Molnar <mingo@redhat.com>,
        Arnaldo Carvalho de Melo <acme@kernel.org>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Jiri Olsa <jolsa@redhat.com>,
        Namhyung Kim <namhyung@kernel.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        "H. Peter Anvin" <hpa@zytor.com>, x86@kernel.org,
        Paolo Bonzini <pbonzini@redhat.com>,
        Radim =?UTF-8?B?S3LEjW3DocWZ?= <rkrcmar@redhat.com>,
        Andi Kleen <ak@linux.intel.com>,
        Kan Liang <kan.liang@intel.com>,
        Colin King <colin.king@canonical.com>,
        Stephane Eranian <eranian@google.com>,
        Sebastian Andrzej Siewior <bigeasy@linutronix.de>,
        Greg Kroah-Hartman <gregkh@linuxfoun
To: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Return-path: <linux-kernel-owner@vger.kernel.org>
In-Reply-To: <20171206150648.GF28074@char.us.oracle.com>
Sender: linux-kernel-owner@vger.kernel.org
List-Id: kvm.vger.kernel.org

On Wed, 6 Dec 2017 10:06:48 -0500
Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> wrote:

> On Wed, Dec 06, 2017 at 02:43:01PM +0300, Jan Dakinevich wrote:
> > w2k16 essentials fails to boot if underlying hypervisor lacks of
> > support for LBR MSRs. To workaround the issue, it suggessted to
> > ignore these MSRs (but not all).
> 
> This is without any hyperv enablement? Meaning normal stock guest?
> 

Yes, it is normal guest. No hyperv enlightenments were enabled, and
"-cpu host" was specified in QEMU command line.

> > 
> > The information, which MSRs are supported for specific platform is
> > taken from perf, it is the subject of the first patch. The second
> > patch adds ignoring for these MSRs to pmu_intel code of KVM.
> > 
> > TODO: use MSR load/store areas to make full support of LBR debug.
> > 
> > Jan Dakinevich (2):
> >   perf/x86/intel: make reusable LBR initialization code
> >   KVM: x86/vPMU: ignore access to LBR-related MSRs
> > 
> >  arch/x86/events/core.c            |   8 +-
> >  arch/x86/events/intel/core.c      |  59 +++------
> >  arch/x86/events/intel/lbr.c       | 272
> > +++++++++++++++++++++++++-------------
> > arch/x86/events/perf_event.h      |  27 +---
> > arch/x86/include/asm/kvm_host.h   |   2 +
> > arch/x86/include/asm/perf_event.h |  11 ++
> > arch/x86/kvm/pmu_intel.c          |  33 +++++ 7 files changed, 250
> > insertions(+), 162 deletions(-)
> > 
> > -- 
> > 2.1.4
> > 



-- 
Best regards
Jan Dakinevich