From mboxrd@z Thu Jan 1 00:00:00 1970 From: Konrad Rzeszutek Wilk Subject: Re: [PATCH v6 2/5] KVM: x86: Add IBPB support Date: Fri, 2 Feb 2018 15:52:20 -0500 Message-ID: <20180202205220.GA2516@char.us.oracle.com> References: <1517522386-18410-1-git-send-email-karahmed@amazon.de> <1517522386-18410-3-git-send-email-karahmed@amazon.de> <20180202174932.GR28192@char.us.oracle.com> <1517594544.31953.62.camel@infradead.org> <20180202195601.GD28192@char.us.oracle.com> <1517602575.31953.74.camel@infradead.org> <20180202202857.GI28192@char.us.oracle.com> <1517603487.31953.76.camel@infradead.org> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: quoted-printable Cc: KarimAllah Ahmed , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org, Ashok Raj , Asit Mallick , Dave Hansen , Arjan Van De Ven , Tim Chen , Linus Torvalds , Andrea Arcangeli , Andi Kleen , Thomas Gleixner , Dan Williams , Jun Nakajima , Andy Lutomirski , Greg KH , Paolo Bonzini , Peter Zijlstra To: David Woodhouse Return-path: Received: from aserp2120.oracle.com ([141.146.126.78]:45256 "EHLO aserp2120.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752723AbeBBUx4 (ORCPT ); Fri, 2 Feb 2018 15:53:56 -0500 Content-Disposition: inline In-Reply-To: <1517603487.31953.76.camel@infradead.org> Sender: kvm-owner@vger.kernel.org List-ID: On Fri, Feb 02, 2018 at 08:31:27PM +0000, David Woodhouse wrote: > On Fri, 2018-02-02 at 15:28 -0500, Konrad Rzeszutek Wilk wrote: > >=20 > > >=A0 > > > No. The AMD feature bits give us more fine-grained support for expo= sing > > > IBPB or IBRS alone, so we expose those bits on Intel too. > >=20 > > But but.. that runs smack against the idea of exposing a platform tha= t > > is as close to emulating the real hardware as possible. > >=20 > > As in I would never expect an Intel CPU to expose the IBPB on the 0x8= 000_0008 > > leaf. Hence KVM (nor any hypervisor) should not do it either. > >=20 > > Unless Intel is doing it? Did I miss a new spec update? >=20 > Are you telling me there's no way you can infer from CPUID that you're > running in a hypervisor? That is not what I am saying. The CPUIDs 0x40000000 ... 0x400000ff are reserved for hypervisor usage. The SDM is pretty clear about it. The Intel SDM and the AMD equivalant are pretty clear about what the other leafs should have on its platform. [5 minutes later] And I am eating my words here.=20 CPUID.80000008 shows how MAXPHYSADDR is used (on the Intel SDM). Never mind the noise.