From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christoffer Dall Subject: Re: [PATCH v1 06/16] kvm: arm/arm64: Fix stage2_flush_memslot for 4 level page table Date: Thu, 8 Feb 2018 12:00:47 +0100 Message-ID: <20180208110047.GI29286@cbox> References: <20180109190414.4017-1-suzuki.poulose@arm.com> <20180109190414.4017-7-suzuki.poulose@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, marc.zyngier@arm.com, linux-kernel@vger.kernel.org, kristina.martsenko@arm.com, peter.maydell@linaro.org, pbonzini@redhat.com, rkrcmar@redhat.com, will.deacon@arm.com, ard.biesheuvel@linaro.org, mark.rutland@arm.com, catalin.marinas@arm.com, Christoffer Dall To: Suzuki K Poulose Return-path: Content-Disposition: inline In-Reply-To: <20180109190414.4017-7-suzuki.poulose@arm.com> Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On Tue, Jan 09, 2018 at 07:04:01PM +0000, Suzuki K Poulose wrote: > So far we have only supported 3 level page table with fixed IPA of 40bits. > Fix stage2_flush_memslot() to accommodate for 4 level tables. > Acked-by: Christoffer Dall > Cc: Marc Zyngier > Cc: Christoffer Dall > Signed-off-by: Suzuki K Poulose > --- > virt/kvm/arm/mmu.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c > index 761787befd3b..e6548c85c495 100644 > --- a/virt/kvm/arm/mmu.c > +++ b/virt/kvm/arm/mmu.c > @@ -375,7 +375,8 @@ static void stage2_flush_memslot(struct kvm *kvm, > pgd = kvm->arch.pgd + stage2_pgd_index(addr); > do { > next = stage2_pgd_addr_end(addr, end); > - stage2_flush_puds(kvm, pgd, addr, next); > + if (!stage2_pgd_none(*pgd)) > + stage2_flush_puds(kvm, pgd, addr, next); > } while (pgd++, addr = next, addr != end); > } > > -- > 2.13.6 >