From mboxrd@z Thu Jan  1 00:00:00 1970
From: Eduardo Habkost <ehabkost@redhat.com>
Subject: Re: [PATCH v7 1/9] i386: Helpers to encode cache
 information consistently
Date: Mon, 7 May 2018 16:05:01 -0300
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To: Babu Moger <babu.moger@amd.com>
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Hi,

I was about to apply this because I assumed it was the same patch
I sent in March, but then I found this:

On Thu, Apr 26, 2018 at 11:26:41AM -0500, Babu Moger wrote:
> From: Eduardo Habkost <ehabkost@redhat.com>
> 
> Instead of having a collection of macros that need to be used in
> complex expressions to build CPUID data, define a CPUCacheInfo
> struct that can hold information about a given cache.  Helper
> functions will take a CPUCacheInfo struct as input to encode
> CPUID leaves for a cache.
> 
> This will help us ensure consistency between cache information
> CPUID leaves, and make the existing inconsistencies in CPUID info
> more visible.
> 
> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
> Signed-off-by: Babu Moger <babu.moger@amd.com>
> Tested-by: Geoffrey McRae <geoff@hostfission.com>
[...]
> -#define L2_ASSOCIATIVITY      16
[...]
>  /*FIXME: CPUID leaf 0x80000006 is inconsistent with leaves 2 & 4 */
> +static CPUCacheInfo l2_cache_amd = {
[...]
> +    .associativity = 8,
[...]
> +};
[...]
>      case 0x80000006:
[...]
> -        *ecx = (L2_SIZE_KB_AMD << 16) | \
> -               (AMD_ENC_ASSOC(L2_ASSOCIATIVITY) << 12) | \
> -               (L2_LINES_PER_TAG << 8) | (L2_LINE_SIZE);
[...]
> +        encode_cache_cpuid80000006(&l2_cache_amd,
> +                                   cpu->enable_l3_cache ? &l3_cache : NULL,
> +                                   ecx, edx);
[...]

The structs added by this patch are supposed to represent the
legacy cache sizes, and must match the old code.  My original
patch set l2_cache_amd.associativity=16 because of that.

This patch changes 0x80000006 from associativity=16 to
associativity=8.  Why?

-- 
Eduardo