From mboxrd@z Thu Jan 1 00:00:00 1970 From: Konrad Rzeszutek Wilk Subject: Re: [PATCH v1] AMD SSB bits. Date: Tue, 5 Jun 2018 16:56:00 -0400 Message-ID: <20180605205600.GR5867@char.us.oracle.com> References: <20180601145921.9500-1-konrad.wilk@oracle.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, x86@kernel.org, tglx@linutronix.de, andrew.cooper3@citrix.com To: Tom Lendacky Return-path: Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On Tue, Jun 05, 2018 at 08:23:13AM -0500, Tom Lendacky wrote: > On 6/1/2018 9:59 AM, Konrad Rzeszutek Wilk wrote: > > Hi, > > > > I was reading the AMD whitepaper on SSBD and noticed that they have added > > two new bits in the 8000_0008 CPUID. EBX: > > 1) Bit[26] - similar to Intel's SSB_NO not needed anymore. > > 2) Bit[24] - use SPEC_CTRL MSR (0x48) instead of VIRT SPEC_CTRL MSR > > (0xC001_011f). > > > > See 124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf > > (A copy of this document is available at > > https://bugzilla.kernel.org/show_bug.cgi?id=199889) > > > > Being that I don't have the hardware (not even sure if AMD has developed it yet) > > I ended up cobbling up a DEBUG patch, the last one - which is well, debug > > (see below). > > So I'm not sure what is debug and what isn't, so I'm just commenting as if > they weren't debug. If this patch is just for debug, then you can > probably ignore. It is just for debugging.