From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eduardo Habkost Subject: Re: [PATCH v12 1/4] i386: Add support for CPUID_8000_001E for AMD Date: Wed, 6 Jun 2018 18:26:26 -0300 Message-ID: <20180606212626.GB7451@localhost.localdomain> References: <1528295806-90593-1-git-send-email-babu.moger@amd.com> <1528295806-90593-2-git-send-email-babu.moger@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: geoff@hostfission.com, kvm@vger.kernel.org, mst@redhat.com, kash@tripleback.net, mtosatti@redhat.com, qemu-devel@nongnu.org, pbonzini@redhat.com, rth@twiddle.net To: Babu Moger Return-path: Content-Disposition: inline In-Reply-To: <1528295806-90593-2-git-send-email-babu.moger@amd.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+gceq-qemu-devel2=m.gmane.org@nongnu.org Sender: "Qemu-devel" List-Id: kvm.vger.kernel.org On Wed, Jun 06, 2018 at 10:36:43AM -0400, Babu Moger wrote: [...] > + /* > + * CPUID_Fn8000001E_EBX > + * 31:16 Reserved > + * 15:8 Threads per core (The number of threads per core is > + * Threads per core + 1) > + * 7:0 Core id (see bit decoding below) > + * SMT: > + * 4:3 node id > + * 2 Core complex id > + * 1:0 Core id > + * Non SMT: > + * 5:4 node id > + * 3 Core complex id > + * 1:0 Core id > + */ Where are those bit offsets documented? AMD Family 17h PPR just says "7:0 Core ID". -- Eduardo