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From: Peter Zijlstra <peterz@infradead.org>
To: Wei Wang <wei.w.wang@intel.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	pbonzini@redhat.com, ak@linux.intel.com, kan.liang@intel.com,
	mingo@redhat.com, rkrcmar@redhat.com, like.xu@intel.com,
	jannh@google.com, arei.gonglei@huawei.com
Subject: Re: [PATCH v3 4/5] KVM/x86/vPMU: Add APIs to support host save/restore the guest lbr stack
Date: Thu, 20 Sep 2018 14:32:23 +0200	[thread overview]
Message-ID: <20180920123223.GS24124@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <1537437959-8751-5-git-send-email-wei.w.wang@intel.com>

On Thu, Sep 20, 2018 at 06:05:58PM +0800, Wei Wang wrote:

> diff --git a/arch/x86/kvm/pmu_intel.c b/arch/x86/kvm/pmu_intel.c
> index 5ab4a36..97a29d7 100644
> --- a/arch/x86/kvm/pmu_intel.c
> +++ b/arch/x86/kvm/pmu_intel.c
> @@ -342,6 +342,47 @@ static void intel_pmu_reset(struct kvm_vcpu *vcpu)
>  		pmu->global_ovf_ctrl = 0;
>  }
>  
> +int intel_pmu_enable_save_guest_lbr(struct kvm_vcpu *vcpu)
> +{
> +	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
> +	struct perf_event *event;
> +	struct perf_event_attr attr = {
> +		.type = PERF_TYPE_RAW,
> +		.size = sizeof(attr),

Bit yuck to imply .config = 0, like that.

> +		.pinned = true,

Note that this can still result in failing to schedule the event, you
create a pinned task event, but a pinned cpu event takes precedence and
can claim the LBR.

How do you deal with that situation, where the LBR is in use by a host
event?

> +		.exclude_host = true,

Didn't you mean to use .exclude_guest ? You don't want this thing to run
when the guest is running, right?

But I still don't like this hack much, what happens if userspace sets
that bit? You seems to have forgotten to combine it with PF_VCPU or
whatever is the appropriate bit to check.

Similarly, how does the existing exclude_{gues,host} crud work?

> +		.sample_type = PERF_SAMPLE_BRANCH_STACK,

What's the point of setting .sample_type if !.sample_period ?

> +		.branch_sample_type = PERF_SAMPLE_BRANCH_CALL_STACK |
> +				      PERF_SAMPLE_BRANCH_USER |
> +				      PERF_SAMPLE_BRANCH_KERNEL,
> +	};

I think this function wants a comment to explain wth its doing and why,
because if someone stumbles over this code in a few months nobody will
remember those things.

> +
> +	if (pmu->guest_lbr_event)
> +		return 0;
> +
> +	event = perf_event_create_kernel_counter(&attr, -1, current, NULL,
> +						 NULL);
> +	if (IS_ERR(event)) {
> +		pr_err("%s: failed %ld\n", __func__, PTR_ERR(event));
> +		return -ENOENT;
> +	}
> +	pmu->guest_lbr_event = event;
> +
> +	return 0;
> +}

  parent reply	other threads:[~2018-09-20 12:32 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-20 10:05 [PATCH v3 0/5] Guest LBR Enabling Wei Wang
2018-09-20 10:05 ` [PATCH v3 1/5] perf/x86: add a function to get the lbr stack Wei Wang
2018-09-20 12:05   ` Peter Zijlstra
2018-09-20 12:07   ` Peter Zijlstra
2018-09-20 10:05 ` [PATCH v3 2/5] KVM/x86: KVM_CAP_X86_GUEST_LBR Wei Wang
2018-09-20 10:05 ` [PATCH v3 3/5] KVM/x86: expose MSR_IA32_PERF_CAPABILITIES to the guest Wei Wang
2018-09-20 12:38   ` Wei Wang
2018-09-20 10:05 ` [PATCH v3 4/5] KVM/x86/vPMU: Add APIs to support host save/restore the guest lbr stack Wei Wang
2018-09-20 12:17   ` Peter Zijlstra
2018-09-20 12:32   ` Peter Zijlstra [this message]
2018-09-27 13:45     ` Wang, Wei W
2018-09-20 15:30   ` Andi Kleen
2018-09-20 16:24     ` Peter Zijlstra
2018-09-27 10:10       ` Wang, Wei W
2018-09-27 10:05     ` Wang, Wei W
2018-09-20 10:05 ` [PATCH v3 5/5] KVM/x86/lbr: lazy save " Wei Wang
2018-09-20 12:07   ` Gonglei (Arei)
2018-09-27 14:11     ` Wang, Wei W
2018-09-20 12:37   ` Peter Zijlstra
2018-09-20 12:58     ` Wei Wang
2018-09-20 12:57       ` Peter Zijlstra
2018-09-20 11:34 ` [PATCH v3 0/5] Guest LBR Enabling Gonglei (Arei)
2018-09-20 12:36   ` Wei Wang

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