From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Gibson Subject: Re: [PATCH 09/19] KVM: PPC: Book3S HV: add a SET_SOURCE control to the XIVE native device Date: Mon, 4 Feb 2019 15:57:51 +1100 Message-ID: <20190204045751.GD1927@umbus.fritz.box> References: <20190107184331.8429-1-clg@kaod.org> <20190107184331.8429-10-clg@kaod.org> Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="0IvGJv3f9h+YhkrH" Cc: kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, Paul Mackerras , linuxppc-dev@lists.ozlabs.org To: =?iso-8859-1?Q?C=E9dric?= Le Goater Return-path: Content-Disposition: inline In-Reply-To: <20190107184331.8429-10-clg@kaod.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+glppe-linuxppc-embedded-2=m.gmane.org@lists.ozlabs.org Sender: "Linuxppc-dev" List-Id: kvm.vger.kernel.org --0IvGJv3f9h+YhkrH Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Jan 07, 2019 at 07:43:21PM +0100, C=E9dric Le Goater wrote: > Interrupt sources are simply created at the OPAL level and then > MASKED. KVM only needs to know about their type: LSI or MSI. This commit message isn't very illuminating. >=20 > Signed-off-by: C=E9dric Le Goater > --- > arch/powerpc/include/uapi/asm/kvm.h | 5 + > arch/powerpc/kvm/book3s_xive_native.c | 98 +++++++++++++++++++ > .../powerpc/kvm/book3s_xive_native_template.c | 27 +++++ > 3 files changed, 130 insertions(+) > create mode 100644 arch/powerpc/kvm/book3s_xive_native_template.c >=20 > diff --git a/arch/powerpc/include/uapi/asm/kvm.h b/arch/powerpc/include/u= api/asm/kvm.h > index 8b78b12aa118..6fc9660c5aec 100644 > --- a/arch/powerpc/include/uapi/asm/kvm.h > +++ b/arch/powerpc/include/uapi/asm/kvm.h > @@ -680,5 +680,10 @@ struct kvm_ppc_cpu_char { > #define KVM_DEV_XIVE_GET_ESB_FD 1 > #define KVM_DEV_XIVE_GET_TIMA_FD 2 > #define KVM_DEV_XIVE_VC_BASE 3 > +#define KVM_DEV_XIVE_GRP_SOURCES 2 /* 64-bit source attributes */ > + > +/* Layout of 64-bit XIVE source attribute values */ > +#define KVM_XIVE_LEVEL_SENSITIVE (1ULL << 0) > +#define KVM_XIVE_LEVEL_ASSERTED (1ULL << 1) > =20 > #endif /* __LINUX_KVM_POWERPC_H */ > diff --git a/arch/powerpc/kvm/book3s_xive_native.c b/arch/powerpc/kvm/boo= k3s_xive_native.c > index 29a62914de55..2518640d4a58 100644 > --- a/arch/powerpc/kvm/book3s_xive_native.c > +++ b/arch/powerpc/kvm/book3s_xive_native.c > @@ -31,6 +31,24 @@ > =20 > #include "book3s_xive.h" > =20 > +/* > + * We still instantiate them here because we use some of the > + * generated utility functions as well in this file. And this comment is downright cryptic. > + */ > +#define XIVE_RUNTIME_CHECKS > +#define X_PFX xive_vm_ > +#define X_STATIC static > +#define X_STAT_PFX stat_vm_ > +#define __x_tima xive_tima > +#define __x_eoi_page(xd) ((void __iomem *)((xd)->eoi_mmio)) > +#define __x_trig_page(xd) ((void __iomem *)((xd)->trig_mmio)) > +#define __x_writeb __raw_writeb > +#define __x_readw __raw_readw > +#define __x_readq __raw_readq > +#define __x_writeq __raw_writeq > + > +#include "book3s_xive_native_template.c" > + > static void xive_native_cleanup_queue(struct kvm_vcpu *vcpu, int prio) > { > struct kvmppc_xive_vcpu *xc =3D vcpu->arch.xive_vcpu; > @@ -305,6 +323,78 @@ static int kvmppc_xive_native_get_tima_fd(struct kvm= ppc_xive *xive, u64 addr) > return put_user(ret, ubufp); > } > =20 > +static int kvmppc_xive_native_set_source(struct kvmppc_xive *xive, long = irq, > + u64 addr) > +{ > + struct kvmppc_xive_src_block *sb; > + struct kvmppc_xive_irq_state *state; > + u64 __user *ubufp =3D (u64 __user *) addr; > + u64 val; > + u16 idx; > + > + pr_devel("%s irq=3D0x%lx\n", __func__, irq); > + > + if (irq < KVMPPC_XIVE_FIRST_IRQ || irq >=3D KVMPPC_XIVE_NR_IRQS) > + return -ENOENT; > + > + sb =3D kvmppc_xive_find_source(xive, irq, &idx); > + if (!sb) { > + pr_debug("No source, creating source block...\n"); Doesn't this need to be protected by some lock? > + sb =3D kvmppc_xive_create_src_block(xive, irq); > + if (!sb) { > + pr_err("Failed to create block...\n"); > + return -ENOMEM; > + } > + } > + state =3D &sb->irq_state[idx]; > + > + if (get_user(val, ubufp)) { > + pr_err("fault getting user info !\n"); > + return -EFAULT; > + } > + > + /* > + * If the source doesn't already have an IPI, allocate > + * one and get the corresponding data > + */ > + if (!state->ipi_number) { > + state->ipi_number =3D xive_native_alloc_irq(); > + if (state->ipi_number =3D=3D 0) { > + pr_err("Failed to allocate IRQ !\n"); > + return -ENOMEM; > + } Am I right in thinking this is the point at which a specific guest irq number gets bound to a specific host irq number? > + xive_native_populate_irq_data(state->ipi_number, > + &state->ipi_data); > + pr_debug("%s allocated hw_irq=3D0x%x for irq=3D0x%lx\n", __func__, > + state->ipi_number, irq); > + } > + > + arch_spin_lock(&sb->lock); > + > + /* Restore LSI state */ > + if (val & KVM_XIVE_LEVEL_SENSITIVE) { > + state->lsi =3D true; > + if (val & KVM_XIVE_LEVEL_ASSERTED) > + state->asserted =3D true; > + pr_devel(" LSI ! Asserted=3D%d\n", state->asserted); > + } > + > + /* Mask IRQ to start with */ > + state->act_server =3D 0; > + state->act_priority =3D MASKED; > + xive_vm_esb_load(&state->ipi_data, XIVE_ESB_SET_PQ_01); > + xive_native_configure_irq(state->ipi_number, 0, MASKED, 0); > + > + /* Increment the number of valid sources and mark this one valid */ > + if (!state->valid) > + xive->src_count++; > + state->valid =3D true; > + > + arch_spin_unlock(&sb->lock); > + > + return 0; > +} > + > static int kvmppc_xive_native_set_attr(struct kvm_device *dev, > struct kvm_device_attr *attr) > { > @@ -317,6 +407,9 @@ static int kvmppc_xive_native_set_attr(struct kvm_dev= ice *dev, > return kvmppc_xive_native_set_vc_base(xive, attr->addr); > } > break; > + case KVM_DEV_XIVE_GRP_SOURCES: > + return kvmppc_xive_native_set_source(xive, attr->attr, > + attr->addr); > } > return -ENXIO; > } > @@ -353,6 +446,11 @@ static int kvmppc_xive_native_has_attr(struct kvm_de= vice *dev, > return 0; > } > break; > + case KVM_DEV_XIVE_GRP_SOURCES: > + if (attr->attr >=3D KVMPPC_XIVE_FIRST_IRQ && > + attr->attr < KVMPPC_XIVE_NR_IRQS) > + return 0; > + break; > } > return -ENXIO; > } > diff --git a/arch/powerpc/kvm/book3s_xive_native_template.c b/arch/powerp= c/kvm/book3s_xive_native_template.c > new file mode 100644 > index 000000000000..e7260da4a596 > --- /dev/null > +++ b/arch/powerpc/kvm/book3s_xive_native_template.c > @@ -0,0 +1,27 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2017-2019, IBM Corporation. > + */ > + > +/* File to be included by other .c files */ > + > +#define XGLUE(a, b) a##b > +#define GLUE(a, b) XGLUE(a, b) > + > +/* > + * TODO: introduce a common template file with the XIVE native layer > + * and the XICS-on-XIVE glue for the utility functions > + */ > +static u8 GLUE(X_PFX, esb_load)(struct xive_irq_data *xd, u32 offset) > +{ > + u64 val; > + > + if (xd->flags & XIVE_IRQ_FLAG_SHIFT_BUG) > + offset |=3D offset << 4; > + > + val =3D __x_readq(__x_eoi_page(xd) + offset); > +#ifdef __LITTLE_ENDIAN__ > + val >>=3D 64-8; > +#endif > + return (u8)val; > +} --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. 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