From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F308C10F14 for ; Fri, 12 Apr 2019 20:18:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7416120869 for ; Fri, 12 Apr 2019 20:18:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726946AbfDLUSk (ORCPT ); Fri, 12 Apr 2019 16:18:40 -0400 Received: from mga11.intel.com ([192.55.52.93]:64856 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726843AbfDLUSj (ORCPT ); Fri, 12 Apr 2019 16:18:39 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Apr 2019 13:18:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,342,1549958400"; d="scan'208";a="140107039" Received: from sjchrist-coffee.jf.intel.com ([10.54.74.181]) by fmsmga008.fm.intel.com with ESMTP; 12 Apr 2019 13:18:39 -0700 From: Sean Christopherson To: Paolo Bonzini , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= Cc: kvm@vger.kernel.org, Sean Christopherson , Liran Alon , Wanpeng Li Subject: [PATCH 2/7] KVM: lapic: Delay 1ns at a time when waiting for timer to "expire" Date: Fri, 12 Apr 2019 13:18:29 -0700 Message-Id: <20190412201834.10831-3-sean.j.christopherson@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190412201834.10831-1-sean.j.christopherson@intel.com> References: <20190412201834.10831-1-sean.j.christopherson@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org To minimize the latency of timer interrupts as observed by the guest, KVM adjusts the values it programs into the host timers to account for the host's overhead of programming and handling the timer event. In the event that the adjustments are too aggressive, i.e. the timer fires earlier than the guest expects, KVM busy waits immediately prior to entering the guest. Currently, KVM manually converts the delay from nanoseconds to clock cycles. But, the conversion is done in the guest's time domain, while the delay occurs in the host's time domain, i.e. the delay may not be accurate and could wait too little or too long. Sidestep the headache of shifting time domains by delaying 1ns at a time and breaking the loop when the guest's desired timer delay has been satisfied. Because the advancement, which caps the delay to avoid unbounded busy waiting, is stored in nanoseconds, the current advancement time can simply be used as a loop terminator since we're delaying 1ns at a time (plus the few cycles of overhead for running the code). Cc: Liran Alon Cc: Wanpeng Li Signed-off-by: Sean Christopherson --- arch/x86/kvm/lapic.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 92446cba9b24..e797e3145a8b 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1486,7 +1486,8 @@ static bool lapic_timer_int_injected(struct kvm_vcpu *vcpu) void wait_lapic_expire(struct kvm_vcpu *vcpu) { struct kvm_lapic *apic = vcpu->arch.apic; - u64 guest_tsc, tsc_deadline, ns; + u32 timer_advance_ns = lapic_timer_advance_ns; + u64 guest_tsc, tmp_tsc, tsc_deadline, ns; if (!lapic_in_kernel(vcpu)) return; @@ -1499,13 +1500,13 @@ void wait_lapic_expire(struct kvm_vcpu *vcpu) tsc_deadline = apic->lapic_timer.expired_tscdeadline; apic->lapic_timer.expired_tscdeadline = 0; - guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc()); + tmp_tsc = guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc()); trace_kvm_wait_lapic_expire(vcpu->vcpu_id, guest_tsc - tsc_deadline); - /* __delay is delay_tsc whenever the hardware has TSC, thus always. */ - if (guest_tsc < tsc_deadline) - __delay(min(tsc_deadline - guest_tsc, - nsec_to_cycles(vcpu, lapic_timer_advance_ns))); + for (ns = 0; tmp_tsc < tsc_deadline && ns < timer_advance_ns; ns++) { + ndelay(1); + tmp_tsc = kvm_read_l1_tsc(vcpu, rdtsc()); + } if (!lapic_timer_advance_adjust_done) { /* too early */ -- 2.21.0