From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CB91C10F0E for ; Mon, 15 Apr 2019 19:59:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4C9CB2070D for ; Mon, 15 Apr 2019 19:59:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728849AbfDOT7k (ORCPT ); Mon, 15 Apr 2019 15:59:40 -0400 Received: from mga05.intel.com ([192.55.52.43]:35605 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728321AbfDOT7k (ORCPT ); Mon, 15 Apr 2019 15:59:40 -0400 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 Apr 2019 12:59:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,354,1549958400"; d="scan'208";a="134587639" Received: from sjchrist-coffee.jf.intel.com (HELO linux.intel.com) ([10.54.74.181]) by orsmga008.jf.intel.com with ESMTP; 15 Apr 2019 12:59:39 -0700 Date: Mon, 15 Apr 2019 12:59:39 -0700 From: Sean Christopherson To: Nadav Amit Cc: Paolo Bonzini , kvm@vger.kernel.org Subject: Re: [kvm-unit-tests PATCH] x86: Prevent APIC base address from changing in test_enable_x2apic() Message-ID: <20190415195939.GL24010@linux.intel.com> References: <20190415183100.6827-1-nadav.amit@gmail.com> <20190415190027.GJ24010@linux.intel.com> <96C8EA7D-C1D3-40E2-95D0-E1F947742F9B@gmail.com> <04ECBA2D-C623-487B-89E2-FC6FD7062C19@gmail.com> <20190415193751.GK24010@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Mon, Apr 15, 2019 at 12:55:42PM -0700, Nadav Amit wrote: > > On Apr 15, 2019, at 12:37 PM, Sean Christopherson wrote: > > > > On Mon, Apr 15, 2019 at 12:12:58PM -0700, Nadav Amit wrote: > >>> On Apr 15, 2019, at 12:09 PM, Nadav Amit wrote: > >>> > >>>> On Apr 15, 2019, at 12:00 PM, Sean Christopherson wrote: > >>>> > >>>> On Mon, Apr 15, 2019 at 11:31:00AM -0700, nadav.amit@gmail.com wrote: > >>>>> From: Nadav Amit > >>>>> > >>>>> test_enable_x2apic() unintentionally changes the APIC base address to > >>>>> zero and resets the BSP indication. This actually causes the local APIC > >>>>> to overlap the IDT area, which is wrong. Prevent it from happening by > >>>>> keeping the APIC base address and BSP-bit as it was before. > >>>>> > >>>>> Signed-off-by: Nadav Amit > >>>>> --- > >>>>> x86/apic.c | 4 ++-- > >>>>> 1 file changed, 2 insertions(+), 2 deletions(-) > >>>>> > >>>>> diff --git a/x86/apic.c b/x86/apic.c > >>>>> index 51744cf..0849f87 100644 > >>>>> --- a/x86/apic.c > >>>>> +++ b/x86/apic.c > >>>>> @@ -90,11 +90,11 @@ static void test_enable_x2apic(void) > >>>>> report("disabled to x2apic enabled", > >>>>> test_write_apicbase_exception(APIC_EN | APIC_EXTD)); > >>>>> > >>>>> - wrmsr(MSR_IA32_APICBASE, APIC_EN); > >>>>> + wrmsr(MSR_IA32_APICBASE, APIC_EN | APIC_DEFAULT_PHYS_BASE | APIC_BSP); > >>>>> report("apic enabled to invalid state", > >>>>> test_write_apicbase_exception(APIC_EXTD)); > >>>>> > >>>>> - wrmsr(MSR_IA32_APICBASE, APIC_EN | APIC_EXTD); > >>>>> + wrmsr(MSR_IA32_APICBASE, APIC_EN | APIC_EXTD | APIC_DEFAULT_PHYS_BASE | APIC_BSP); > >>>> > >>>> It probably doesn't matter since AFAIK kvm-unit-tests always uses the > >>>> default base, but preserving the current base+BSP would be preferred. > >>>> The #GP tests get away with using APIC_DEFAULT_PHYS_BASE because the > >>>> WRMSR will never succeed, but even that is poor form. And the test > >>>> should also reset to xAPIC when it's done. > >>>> > >>>> I think the attached patch covers everything. > >>> > >>> Thanks. The base is indeed the default, so it should not matter, but your > >>> change should make the code more robust. > >>> > >>> One important comment regarding your patch: > >>> > >>>> + if (!(orig_apicbase & APIC_EXTD)) > >>>> + reset_apic(); > >>> > >>> This is not needed, since enable_x2apic() will only return true if it > >>> succeeded in enabling x2apic. In addition, this is wrong, since reset_apic() > >>> should (usually, and specifically in this case) be followed with: > >>> > >>> apic_write(APIC_SPIV, 0x1ff); > >>> > >>> And not the other way around (there are actually a couple of missing writes > >>> to software-enable the APIC after reset_apic(), which I’ll send later). > >> > >> Correcting myself - I understand (now) that you want to reset back to xapic, so > >> that’s fine. Just keep "apic_write(APIC_SPIV, 0x1ff);” after the reset, please. > > > > Ah, will do, I glazed over the apic_write() and didn't consider its purpose. > > Sorry for not being consistent, but actually the apic_reset() seems wrong in > general. > > enable_x2apic() is used in the context of test_enable_x2apic() to figure out > whether x2apic was enabled before. It is actually initially enabled after > boot (see cstart64.S). So disabling it here would not be appropriate. I more or less noticed the same thing. Actually, I noticed we end up in legacy xAPIC and so ended up with: if (orig_apicbase & APIC_EXTD) enable_x2apic(); else reset_apic(); Along with a blurb in the changelog stating that reset_apic() is overkill since the vCPU is already in xAPIC.