From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2200C10F11 for ; Wed, 24 Apr 2019 15:57:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9EF0321900 for ; Wed, 24 Apr 2019 15:57:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732048AbfDXP5z (ORCPT ); Wed, 24 Apr 2019 11:57:55 -0400 Received: from mga02.intel.com ([134.134.136.20]:14217 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731467AbfDXP5z (ORCPT ); Wed, 24 Apr 2019 11:57:55 -0400 X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Apr 2019 08:57:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,390,1549958400"; d="scan'208";a="318604492" Received: from sjchrist-coffee.jf.intel.com (HELO linux.intel.com) ([10.54.74.181]) by orsmga005.jf.intel.com with ESMTP; 24 Apr 2019 08:57:54 -0700 Date: Wed, 24 Apr 2019 08:57:54 -0700 From: Sean Christopherson To: "Huang, Kai" Cc: "kvm@vger.kernel.org" , "tglx@linutronix.de" , "guangrong.xiao@gmail.com" , "hpa@zytor.com" , "pbonzini@redhat.com" , "bp@alien8.de" , "thomas.lendacky@amd.com" , "rkrcmar@redhat.com" , "brijesh.singh@amd.com" , "junaids@google.com" Subject: Re: [PATCH] kvm: x86: Fix several SPTE mask calculation errors caused by MKTME Message-ID: <20190424155754.GD18442@linux.intel.com> References: <20190416091948.4420-1-kai.huang@linux.intel.com> <20190422163929.GB1236@linux.intel.com> <1555984614.2776.58.camel@intel.com> <1556107989.29618.30.camel@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1556107989.29618.30.camel@intel.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Wed, Apr 24, 2019 at 05:13:12AM -0700, Huang, Kai wrote: > > > > > low_phys_bits = boot_cpu_data.x86_phys_bits; > > > > - if (boot_cpu_data.x86_phys_bits < > > > > - 52 - shadow_nonpresent_or_rsvd_mask_len) { > > > > + shadow_nonpresent_or_rsvd_mask = 0; > > > > + if (need_l1tf) { > > > > shadow_nonpresent_or_rsvd_mask = > > > > rsvd_bits(boot_cpu_data.x86_phys_bits - > > > > shadow_nonpresent_or_rsvd_mask_len, > > > > > > This is broken, the reserved bits mask is being calculated with the wrong > > > number of physical bits. I think fixing this would eliminate the need for > > > the high_gpa_offset shenanigans. > > > > You are right. should use 'shadow_phys_bits' instead. Thanks. Let me think > > whether high_gpa_offset can be avoided. > > > > Hi Sean, Paolo, and others, > > After re-thinking, I think we should even use boot_cpu_data.x86_cache_bits to > calculate shadow_nonpresent_or_rsvd_mask, but not shadow_phys_bits, since for > some particular Intel CPU, the internal cache bits are larger than physical > address bits reported by CPUID. To make this KVM L1TF migitation work, we > actually have to set the highest bit of cache bits, but not the physical > address bits in SPTE (which means the original code also has a bug if I > understand correctly). What's the exact CPU behavior you're referencing? Unless it's doing some crazy PA aliasing it should be a non-issue.