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From: Peter Xu <zhexu@redhat.com>
To: Sean Christopherson <sean.j.christopherson@intel.com>
Cc: "Peter Xu" <zhexu@redhat.com>,
	kvm@vger.kernel.org, "Marcelo Tosatti" <mtosatti@redhat.com>,
	"Luiz Capitulino" <lcapitulino@redhat.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>
Subject: Re: [kvm-unit-tests PATCH] tscdeadline_latency: Check condition first before loop
Date: Fri, 12 Jul 2019 07:27:36 +0800	[thread overview]
Message-ID: <20190711232736.GD7847@xz-x1> (raw)
In-Reply-To: <20190711140553.GB7645@linux.intel.com>

On Thu, Jul 11, 2019 at 07:05:53AM -0700, Sean Christopherson wrote:
> Ensuring the first hlt lands in an interrupt shadow should prevent getting
> into a halted state after the timer has been disabled, e.g.:
> 
>     irq_disable();
>     test_tsc_deadline_timer();
> 
>     do {
>         safe_halt();
>     } while (!hitmax && table_idx < size);

Yes seems better, thanks for the suggestion (though I'll probably also
need to remove the hidden sti in start_tsc_deadline_timer).

Is safe_halt() really safe?  I mean, IRQ handler could still run
before HLT right after STI right?  Though no matter what I think it's
fine for this test case because we'll skip the first IRQ after all.
Just curious.

Thanks,

-- 
Peter Xu

  reply	other threads:[~2019-07-11 23:27 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-11  7:17 [kvm-unit-tests PATCH] tscdeadline_latency: Check condition first before loop Peter Xu
2019-07-11  7:33 ` Peter Xu
2019-07-11 14:05   ` Sean Christopherson
2019-07-11 23:27     ` Peter Xu [this message]
2019-07-11 23:34       ` Sean Christopherson

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