From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5931C10F14 for ; Tue, 15 Oct 2019 16:28:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C2A6B2086A for ; Tue, 15 Oct 2019 16:28:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728869AbfJOQ2v (ORCPT ); Tue, 15 Oct 2019 12:28:51 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47436 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726753AbfJOQ2u (ORCPT ); Tue, 15 Oct 2019 12:28:50 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2EED13E2AF; Tue, 15 Oct 2019 16:28:50 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 25C5A19C5B; Tue, 15 Oct 2019 16:28:41 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Aleksandar Markovic , Aurelien Jarno , Eduardo Habkost , Thomas Huth , Igor Mammedov , Anthony Perard , Stefano Stabellini , Paul Durrant , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Rikalo , xen-devel@lists.xenproject.org, Laurent Vivier , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , kvm@vger.kernel.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 07/32] MAINTAINERS: Keep PIIX4 South Bridge separate from PC Chipsets Date: Tue, 15 Oct 2019 18:26:40 +0200 Message-Id: <20191015162705.28087-8-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Tue, 15 Oct 2019 16:28:50 +0000 (UTC) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Philippe Mathieu-Daudé The PIIX4 Southbridge is not used by the PC machine, but by the Malta board (MIPS). Add a new section to keep it covered. Suggested-by: Michael S. Tsirkin Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index fe4dc51b08..c9f625fc2e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1230,7 +1230,6 @@ F: hw/pci-host/q35.c F: hw/pci-host/pam.c F: include/hw/pci-host/q35.h F: include/hw/pci-host/pam.h -F: hw/isa/piix4.c F: hw/isa/lpc_ich9.c F: hw/i2c/smbus_ich9.c F: hw/acpi/piix4.c @@ -1716,6 +1715,12 @@ F: hw/display/edid* F: include/hw/display/edid.h F: qemu-edid.c +PIIX4 South Bridge (i82371AB) +M: Hervé Poussineau +M: Philippe Mathieu-Daudé +S: Maintained +F: hw/isa/piix4.c + Firmware configuration (fw_cfg) M: Philippe Mathieu-Daudé R: Laszlo Ersek -- 2.21.0