From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4BE5AC33C8C for ; Mon, 6 Jan 2020 22:49:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2D28520731 for ; Mon, 6 Jan 2020 22:49:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726939AbgAFWtc (ORCPT ); Mon, 6 Jan 2020 17:49:32 -0500 Received: from mga12.intel.com ([192.55.52.136]:51362 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726721AbgAFWtc (ORCPT ); Mon, 6 Jan 2020 17:49:32 -0500 X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Jan 2020 14:49:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,403,1571727600"; d="scan'208";a="216958946" Received: from sjchrist-coffee.jf.intel.com (HELO linux.intel.com) ([10.54.74.202]) by fmsmga007.fm.intel.com with ESMTP; 06 Jan 2020 14:49:31 -0800 Date: Mon, 6 Jan 2020 14:49:31 -0800 From: Sean Christopherson To: Tom Lendacky Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Paolo Bonzini , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , Brijesh Singh Subject: Re: [PATCH v2] KVM: SVM: Override default MMIO mask if memory encryption is enabled Message-ID: <20200106224931.GB12879@linux.intel.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Fri, Dec 27, 2019 at 09:58:00AM -0600, Tom Lendacky wrote: > The KVM MMIO support uses bit 51 as the reserved bit to cause nested page > faults when a guest performs MMIO. The AMD memory encryption support uses > a CPUID function to define the encryption bit position. Given this, it is > possible that these bits can conflict. > > Use svm_hardware_setup() to override the MMIO mask if memory encryption > support is enabled. When memory encryption support is enabled the physical > address width is reduced and the first bit after the last valid reduced > physical address bit will always be reserved. Use this bit as the MMIO > mask. > > Fixes: 28a1f3ac1d0c ("kvm: x86: Set highest physical address bits in non-present/reserved SPTEs") > Suggested-by: Sean Christopherson > Signed-off-by: Tom Lendacky > --- > arch/x86/kvm/svm.c | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c > index 122d4ce3b1ab..2cb834b5982a 100644 > --- a/arch/x86/kvm/svm.c > +++ b/arch/x86/kvm/svm.c > @@ -1361,6 +1361,32 @@ static __init int svm_hardware_setup(void) > } > } > > + /* > + * The default MMIO mask is a single bit (excluding the present bit), > + * which could conflict with the memory encryption bit. Check for > + * memory encryption support and override the default MMIO masks if > + * it is enabled. > + */ > + if (cpuid_eax(0x80000000) >= 0x8000001f) { > + u64 msr, mask; > + > + rdmsrl(MSR_K8_SYSCFG, msr); > + if (msr & MSR_K8_SYSCFG_MEM_ENCRYPT) { > + /* > + * The physical addressing width is reduced. The first > + * bit above the new physical addressing limit will > + * always be reserved. Use this bit and the present bit > + * to generate a page fault with PFER.RSV = 1. > + */ > + mask = BIT_ULL(boot_cpu_data.x86_phys_bits); This doesn't handle the case where x86_phys_bits _isn't_ reduced by SME/SEV on a future processor, i.e. x86_phys_bits==52. After staring at things for a while, I think we can handle this issue with minimal fuss by special casing MKTME in kvm_set_mmio_spte_mask(). I'll send a patch, I have a related bug fix for kvm_set_mmio_spte_mask() that touches the same code. > + mask |= BIT_ULL(0); > + > + kvm_mmu_set_mmio_spte_mask(mask, mask, > + PT_WRITABLE_MASK | > + PT_USER_MASK); > + } > + } > + > for_each_possible_cpu(cpu) { > r = svm_cpu_init(cpu); > if (r) > -- > 2.17.1 >