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From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Sean Christopherson <sean.j.christopherson@intel.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	Wanpeng Li <wanpengli@tencent.com>,
	Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 26/26] KVM: VMX: Directly query Intel PT mode when refreshing PMUs
Date: Wed, 29 Jan 2020 15:46:40 -0800	[thread overview]
Message-ID: <20200129234640.8147-27-sean.j.christopherson@intel.com> (raw)
In-Reply-To: <20200129234640.8147-1-sean.j.christopherson@intel.com>

Use vmx_pt_mode_is_host_guest() in intel_pmu_refresh() instead of
bouncing through kvm_x86_ops->pt_supported and remove ->pt_supported()
as the PMU code was the last remaining user.

Opportunistically clean up the wording of a comment that referenced
kvm_x86_ops->pt_supported().

No functional change intended.

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
---
 arch/x86/include/asm/kvm_host.h | 1 -
 arch/x86/kvm/svm.c              | 6 ------
 arch/x86/kvm/vmx/pmu_intel.c    | 2 +-
 arch/x86/kvm/vmx/vmx.c          | 6 ------
 arch/x86/kvm/x86.c              | 7 +++----
 5 files changed, 4 insertions(+), 18 deletions(-)

diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index ea076debe6f8..3106abbf5ac2 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -1164,7 +1164,6 @@ struct kvm_x86_ops {
 		enum exit_fastpath_completion *exit_fastpath);
 
 	bool (*umip_emulated)(void);
-	bool (*pt_supported)(void);
 
 	int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
 	void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index a08ee7b2dddb..dd616cac6e67 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -6108,11 +6108,6 @@ static bool svm_umip_emulated(void)
 	return false;
 }
 
-static bool svm_pt_supported(void)
-{
-	return false;
-}
-
 static bool svm_has_wbinvd_exit(void)
 {
 	return true;
@@ -7474,7 +7469,6 @@ static struct kvm_x86_ops svm_x86_ops __ro_after_init = {
 	.cpuid_update = svm_cpuid_update,
 
 	.umip_emulated = svm_umip_emulated,
-	.pt_supported = svm_pt_supported,
 
 	.set_supported_cpuid = svm_set_supported_cpuid,
 
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index 34a3a17bb6d7..d8f5cb312b9d 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -330,7 +330,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
 	pmu->global_ovf_ctrl_mask = pmu->global_ctrl_mask
 			& ~(MSR_CORE_PERF_GLOBAL_OVF_CTRL_OVF_BUF |
 			    MSR_CORE_PERF_GLOBAL_OVF_CTRL_COND_CHGD);
-	if (kvm_x86_ops->pt_supported())
+	if (vmx_pt_mode_is_host_guest())
 		pmu->global_ovf_ctrl_mask &=
 				~MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI;
 
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 10c31aa40730..75842b574e26 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -6318,11 +6318,6 @@ static bool vmx_has_emulated_msr(u32 index)
 	}
 }
 
-static bool vmx_pt_supported(void)
-{
-	return vmx_pt_mode_is_host_guest();
-}
-
 static void vmx_recover_nmi_blocking(struct vcpu_vmx *vmx)
 {
 	u32 exit_intr_info;
@@ -7914,7 +7909,6 @@ static struct kvm_x86_ops vmx_x86_ops __ro_after_init = {
 	.check_intercept = vmx_check_intercept,
 	.handle_exit_irqoff = vmx_handle_exit_irqoff,
 	.umip_emulated = vmx_umip_emulated,
-	.pt_supported = vmx_pt_supported,
 
 	.request_immediate_exit = vmx_request_immediate_exit,
 
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 03e656d05c15..e889e83dbb78 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -2805,10 +2805,9 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 		    !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
 			return 1;
 		/*
-		 * We do support PT if kvm_x86_ops->pt_supported(), but we do
-		 * not support IA32_XSS[bit 8]. Guests will have to use
-		 * RDMSR/WRMSR rather than XSAVES/XRSTORS to save/restore PT
-		 * MSRs.
+		 * KVM supports exposing PT to the guest, but does not support
+		 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
+		 * XSAVES/XRSTORS to save/restore PT MSRs.
 		 */
 		if (data != 0)
 			return 1;
-- 
2.24.1


      parent reply	other threads:[~2020-01-29 23:47 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-29 23:46 [PATCH 00/26] KVM: x86: Purge kvm_x86_ops->*_supported() Sean Christopherson
2020-01-29 23:46 ` [PATCH 01/26] KVM: x86: Remove superfluous brackets from case statement Sean Christopherson
2020-02-05 14:29   ` Vitaly Kuznetsov
2020-02-05 14:32     ` Sean Christopherson
2020-01-29 23:46 ` [PATCH 02/26] KVM: x86: Take an unsigned 32-bit int for has_emulated_msr()'s index Sean Christopherson
2020-02-05 14:30   ` Vitaly Kuznetsov
2020-01-29 23:46 ` [PATCH 03/26] KVM: x86: Snapshot MSR index in a local variable when processing lists Sean Christopherson
2020-02-05 14:31   ` Vitaly Kuznetsov
2020-01-29 23:46 ` [PATCH 04/26] KVM: x86: Add a kvm_x86_ops hook to query virtualized MSR support Sean Christopherson
2020-02-05 14:34   ` Vitaly Kuznetsov
2020-02-05 14:59     ` Sean Christopherson
2020-02-05 15:22       ` Vitaly Kuznetsov
2020-02-05 15:35         ` Sean Christopherson
2020-02-05 16:55           ` Vitaly Kuznetsov
2020-02-05 17:02             ` Sean Christopherson
2020-02-06 12:08               ` Vitaly Kuznetsov
2020-01-29 23:46 ` [PATCH 05/26] KVM: x86: Move MSR_TSC_AUX existence checks into vendor code Sean Christopherson
2020-02-05 14:39   ` Vitaly Kuznetsov
2020-01-29 23:46 ` [PATCH 06/26] KVM: x86: Move MSR_IA32_BNDCFGS " Sean Christopherson
2020-02-05 14:53   ` Vitaly Kuznetsov
2020-01-29 23:46 ` [PATCH 07/26] KVM: VMX: Add helpers to query Intel PT mode Sean Christopherson
2020-01-29 23:46 ` [PATCH 08/26] KVM: x86: Move RTIT (Intel PT) MSR existence checks into vendor code Sean Christopherson
2020-01-29 23:46 ` [PATCH 09/26] KVM: x86: Calculate the supported xcr0 mask at load time Sean Christopherson
2020-01-29 23:46 ` [PATCH 10/26] KVM: x86: Use supported_xcr0 to detect MPX support Sean Christopherson
2020-01-29 23:46 ` [PATCH 11/26] KVM: x86: Make kvm_mpx_supported() an inline function Sean Christopherson
2020-01-29 23:46 ` [PATCH 12/26] KVM: x86: Drop explicit @func param from ->set_supported_cpuid() Sean Christopherson
2020-01-29 23:46 ` [PATCH 13/26] KVM: x86: Use u32 for holding CPUID register value in helpers Sean Christopherson
2020-01-29 23:46 ` [PATCH 14/26] KVM: x86: Introduce cpuid_entry_{get,has}() accessors Sean Christopherson
2020-01-29 23:46 ` [PATCH 15/26] KVM: x86: Introduce cpuid_entry_{change,set,clear}() mutators Sean Christopherson
2020-01-29 23:46 ` [PATCH 16/26] KVM: x86: Add Kconfig-controlled auditing of reverse CPUID lookups Sean Christopherson
2020-01-29 23:46 ` [PATCH 17/26] KVM: x86: Handle MPX CPUID adjustment in vendor code Sean Christopherson
2020-01-29 23:46 ` [PATCH 18/26] KVM: x86: Handle INVPCID " Sean Christopherson
2020-01-29 23:46 ` [PATCH 19/26] KVM: x86: Handle UMIP emulation CPUID adjustment in VMX code Sean Christopherson
2020-01-29 23:46 ` [PATCH 20/26] KVM: x86: Handle PKU CPUID adjustment in SVM code Sean Christopherson
2020-01-29 23:46 ` [PATCH 21/26] KVM: x86: Handle RDTSCP CPUID adjustment in VMX code Sean Christopherson
2020-01-29 23:46 ` [PATCH 22/26] KVM: x86: Handle XSAVES " Sean Christopherson
2020-01-29 23:46 ` [PATCH 23/26] KVM: x86: Handle Intel PT CPUID adjustment in vendor code Sean Christopherson
2020-01-29 23:46 ` [PATCH 24/26] KVM: x86: Clear output regs for CPUID 0x14 if PT isn't exposed to guest Sean Christopherson
2020-01-29 23:46 ` [PATCH 25/26] KVM: x86: Handle main Intel PT CPUID leaf in vendor code Sean Christopherson
2020-01-30  0:38   ` Sean Christopherson
2020-01-29 23:46 ` Sean Christopherson [this message]

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