From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A466C35247 for ; Wed, 5 Feb 2020 17:01:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6ACCD20674 for ; Wed, 5 Feb 2020 17:01:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727511AbgBERBA (ORCPT ); Wed, 5 Feb 2020 12:01:00 -0500 Received: from foss.arm.com ([217.140.110.172]:49696 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727303AbgBERBA (ORCPT ); Wed, 5 Feb 2020 12:01:00 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9FF8C1FB; Wed, 5 Feb 2020 09:00:59 -0800 (PST) Received: from donnerap.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 90A243F52E; Wed, 5 Feb 2020 09:00:58 -0800 (PST) Date: Wed, 5 Feb 2020 17:00:56 +0000 From: Andre Przywara To: Alexandru Elisei Cc: kvm@vger.kernel.org, will@kernel.org, julien.thierry.kdev@gmail.com, sami.mujawar@arm.com, lorenzo.pieralisi@arm.com, maz@kernel.org Subject: Re: [PATCH v2 kvmtool 20/30] pci: Add helpers for BAR values and memory/IO space access Message-ID: <20200205170056.3bfdf054@donnerap.cambridge.arm.com> In-Reply-To: <20200123134805.1993-21-alexandru.elisei@arm.com> References: <20200123134805.1993-1-alexandru.elisei@arm.com> <20200123134805.1993-21-alexandru.elisei@arm.com> Organization: ARM X-Mailer: Claws Mail 3.17.3 (GTK+ 2.24.32; aarch64-unknown-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Thu, 23 Jan 2020 13:47:55 +0000 Alexandru Elisei wrote: Hi, > We're going to be checking the BAR type, the address written to it and > if access to memory or I/O space is enabled quite often when we add > support for reasignable BARs, add helpers for it. I am not a particular fan of these double underscores inside identifiers, but I guess that is too late now, since it's already all over the place. So: > Signed-off-by: Alexandru Elisei Reviewed-by: Andre Przywara Cheers, Andre. > --- > include/kvm/pci.h | 48 +++++++++++++++++++++++++++++++++++++++++++++++ > pci.c | 2 +- > 2 files changed, 49 insertions(+), 1 deletion(-) > > diff --git a/include/kvm/pci.h b/include/kvm/pci.h > index ccb155e3e8fe..235cd82fff3c 100644 > --- a/include/kvm/pci.h > +++ b/include/kvm/pci.h > @@ -5,6 +5,7 @@ > #include > #include > #include > +#include > > #include "kvm/devices.h" > #include "kvm/msi.h" > @@ -161,4 +162,51 @@ void pci__config_rd(struct kvm *kvm, union pci_config_address addr, void *data, > > void *pci_find_cap(struct pci_device_header *hdr, u8 cap_type); > > +static inline bool __pci__memory_space_enabled(u16 command) > +{ > + return command & PCI_COMMAND_MEMORY; > +} > + > +static inline bool pci__memory_space_enabled(struct pci_device_header *pci_hdr) > +{ > + return __pci__memory_space_enabled(pci_hdr->command); > +} > + > +static inline bool __pci__io_space_enabled(u16 command) > +{ > + return command & PCI_COMMAND_IO; > +} > + > +static inline bool pci__io_space_enabled(struct pci_device_header *pci_hdr) > +{ > + return __pci__io_space_enabled(pci_hdr->command); > +} > + > +static inline bool __pci__bar_is_io(u32 bar) > +{ > + return bar & PCI_BASE_ADDRESS_SPACE_IO; > +} > + > +static inline bool pci__bar_is_io(struct pci_device_header *pci_hdr, int bar_num) > +{ > + return __pci__bar_is_io(pci_hdr->bar[bar_num]); > +} > + > +static inline bool pci__bar_is_memory(struct pci_device_header *pci_hdr, int bar_num) > +{ > + return !pci__bar_is_io(pci_hdr, bar_num); > +} > + > +static inline u32 __pci__bar_address(u32 bar) > +{ > + if (__pci__bar_is_io(bar)) > + return bar & PCI_BASE_ADDRESS_IO_MASK; > + return bar & PCI_BASE_ADDRESS_MEM_MASK; > +} > + > +static inline u32 pci__bar_address(struct pci_device_header *pci_hdr, int bar_num) > +{ > + return __pci__bar_address(pci_hdr->bar[bar_num]); > +} > + > #endif /* KVM__PCI_H */ > diff --git a/pci.c b/pci.c > index b6892d974c08..4f7b863298f6 100644 > --- a/pci.c > +++ b/pci.c > @@ -185,7 +185,7 @@ void pci__config_wr(struct kvm *kvm, union pci_config_address addr, void *data, > * size, it will write the address back. > */ > if (bar < 6) { > - if (pci_hdr->bar[bar] & PCI_BASE_ADDRESS_SPACE_IO) > + if (pci__bar_is_io(pci_hdr, bar)) > mask = (u32)PCI_BASE_ADDRESS_IO_MASK; > else > mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;