From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A24ABC54FCF for ; Wed, 25 Mar 2020 15:15:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6BD0B2076A for ; Wed, 25 Mar 2020 15:15:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="UEqbnulY" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727656AbgCYPPv (ORCPT ); Wed, 25 Mar 2020 11:15:51 -0400 Received: from us-smtp-delivery-74.mimecast.com ([216.205.24.74]:39777 "EHLO us-smtp-delivery-74.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727123AbgCYPPv (ORCPT ); Wed, 25 Mar 2020 11:15:51 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1585149349; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=85Iz7qm55ak28GWxIHEHs8MmNnZEjWo4E+H4mhBr6/Q=; b=UEqbnulYudcrnHgP8v6qaA1orvcJkNiQsWhsBbol6IusTRspueNgpEqMrC+qMqq+0EYDVn 4wgW0IH8MVAMcxVb4GhTs5Le8fFAJR/DrKdHzpsPq8R9THhDGbzv2rACQNHwHyvZoVevhS nUjs+w/oUq7o3gtCoTCPr7x3UPpM77c= Received: from mail-wm1-f71.google.com (mail-wm1-f71.google.com [209.85.128.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-37-nxHcfI5eM_uJfyOQNcSQMg-1; Wed, 25 Mar 2020 11:15:48 -0400 X-MC-Unique: nxHcfI5eM_uJfyOQNcSQMg-1 Received: by mail-wm1-f71.google.com with SMTP id x26so512068wmc.6 for ; Wed, 25 Mar 2020 08:15:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=85Iz7qm55ak28GWxIHEHs8MmNnZEjWo4E+H4mhBr6/Q=; b=FQtUSnnOsSyi4IKR7hdJr3vuN2/INv4MHyZBIThujBWZbpE16MaVxkJ/na1ukQE0xc mpyimNZMdyCjBJm92EDF28mrSol7Uwgqv4Hq+DnKBM20a6jsuiXYB3SYygXGQt1uX20U E5VdJxc8TC5OltL+s6LDNWCFrhM7+r0acWoyS6gckNKK5UYOMQ6SKxPBD9UUxBb1Sbca FgOw2V9lBvcF4RY2XDF2sgpXhkIsYQEpqzcvq2+EsGrXY06sz/D8/7olqwrlcr6Docqk Shk2gUKGRkCPU2qLRcuK1gRIrVfckESJBDDKh9jbbrvn0ILytbtNBgF/6hlg0avPtkJs AU+g== X-Gm-Message-State: ANhLgQ1FzKgt1aBug2u7yEdqIa4yeYh8baa9Gnw0kLVZ+RyaJUGiKO8H f8ygB6n2I/Nh/UhNL9/fwIlhJ3gZjFrC5K/3Vuwgsu1J74Dd8BbnOZD22T0wll+jfDhcEtFiobu x4zpE8ga+KNaK X-Received: by 2002:a1c:1b51:: with SMTP id b78mr3936819wmb.8.1585149347011; Wed, 25 Mar 2020 08:15:47 -0700 (PDT) X-Google-Smtp-Source: ADFU+vtvttgse0+xLvAuZ1+Y+vqPJhjVQWmRMDmQ8GkvLI7/TEIhbBiRpP5z+u7oZYO7GONLwyERYg== X-Received: by 2002:a1c:1b51:: with SMTP id b78mr3936803wmb.8.1585149346812; Wed, 25 Mar 2020 08:15:46 -0700 (PDT) Received: from xz-x1 ([2607:9880:19c0:32::2]) by smtp.gmail.com with ESMTPSA id y80sm10091321wmc.45.2020.03.25.08.15.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Mar 2020 08:15:46 -0700 (PDT) Date: Wed, 25 Mar 2020 11:15:40 -0400 From: Peter Xu To: "Liu, Yi L" Cc: "qemu-devel@nongnu.org" , "alex.williamson@redhat.com" , "eric.auger@redhat.com" , "pbonzini@redhat.com" , "mst@redhat.com" , "david@gibson.dropbear.id.au" , "Tian, Kevin" , "Tian, Jun J" , "Sun, Yi Y" , "kvm@vger.kernel.org" , "Wu, Hao" , "jean-philippe@linaro.org" , Jacob Pan , Yi Sun , Richard Henderson , Eduardo Habkost Subject: Re: [PATCH v1 19/22] intel_iommu: process PASID-based iotlb invalidation Message-ID: <20200325151540.GE354390@xz-x1> References: <1584880579-12178-1-git-send-email-yi.l.liu@intel.com> <1584880579-12178-20-git-send-email-yi.l.liu@intel.com> <20200324182623.GD127076@xz-x1> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Wed, Mar 25, 2020 at 01:36:03PM +0000, Liu, Yi L wrote: > > From: Peter Xu > > Sent: Wednesday, March 25, 2020 2:26 AM > > To: Liu, Yi L > > Subject: Re: [PATCH v1 19/22] intel_iommu: process PASID-based iotlb invalidation > > > > On Sun, Mar 22, 2020 at 05:36:16AM -0700, Liu Yi L wrote: > > > This patch adds the basic PASID-based iotlb (piotlb) invalidation > > > support. piotlb is used during walking Intel VT-d 1st level page > > > table. This patch only adds the basic processing. Detailed handling > > > will be added in next patch. > > > > > > Cc: Kevin Tian > > > Cc: Jacob Pan > > > Cc: Peter Xu > > > Cc: Yi Sun > > > Cc: Paolo Bonzini > > > Cc: Richard Henderson > > > Cc: Eduardo Habkost > > > Signed-off-by: Liu Yi L > > > --- > > > hw/i386/intel_iommu.c | 57 > > ++++++++++++++++++++++++++++++++++++++++++ > > > hw/i386/intel_iommu_internal.h | 13 ++++++++++ > > > 2 files changed, 70 insertions(+) > > > > > > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index > > > b007715..b9ac07d 100644 > > > --- a/hw/i386/intel_iommu.c > > > +++ b/hw/i386/intel_iommu.c > > > @@ -3134,6 +3134,59 @@ static bool vtd_process_pasid_desc(IntelIOMMUState > > *s, > > > return (ret == 0) ? true : false; } > > > > > > +static void vtd_piotlb_pasid_invalidate(IntelIOMMUState *s, > > > + uint16_t domain_id, > > > + uint32_t pasid) { } > > > + > > > +static void vtd_piotlb_page_invalidate(IntelIOMMUState *s, uint16_t domain_id, > > > + uint32_t pasid, hwaddr addr, uint8_t am, > > > +bool ih) { } > > > + > > > +static bool vtd_process_piotlb_desc(IntelIOMMUState *s, > > > + VTDInvDesc *inv_desc) { > > > + uint16_t domain_id; > > > + uint32_t pasid; > > > + uint8_t am; > > > + hwaddr addr; > > > + > > > + if ((inv_desc->val[0] & VTD_INV_DESC_PIOTLB_RSVD_VAL0) || > > > + (inv_desc->val[1] & VTD_INV_DESC_PIOTLB_RSVD_VAL1)) { > > > + error_report_once("non-zero-field-in-piotlb_inv_desc hi: 0x%" PRIx64 > > > + " lo: 0x%" PRIx64, inv_desc->val[1], inv_desc->val[0]); > > > + return false; > > > + } > > > + > > > + domain_id = VTD_INV_DESC_PIOTLB_DID(inv_desc->val[0]); > > > + pasid = VTD_INV_DESC_PIOTLB_PASID(inv_desc->val[0]); > > > + switch (inv_desc->val[0] & VTD_INV_DESC_IOTLB_G) { > > > + case VTD_INV_DESC_PIOTLB_ALL_IN_PASID: > > > + vtd_piotlb_pasid_invalidate(s, domain_id, pasid); > > > + break; > > > + > > > + case VTD_INV_DESC_PIOTLB_PSI_IN_PASID: > > > + am = VTD_INV_DESC_PIOTLB_AM(inv_desc->val[1]); > > > + addr = (hwaddr) VTD_INV_DESC_PIOTLB_ADDR(inv_desc->val[1]); > > > + if (am > VTD_MAMV) { > > > > I saw this of spec 10.4.2, MAMV: > > > > Independent of value reported in this field, implementations > > supporting SMTS must support address-selective PASID-based > > IOTLB invalidations (p_iotlb_inv_dsc) with any defined address > > mask. > > > > Does it mean we should even support larger AM? > > > > Besides that, the patch looks good to me. > > I don't think so. This field is for second-level table in scalable mode > and the translation table in legacy mode. For first-level table, it always > supports page selective invalidation and all the supported masks > regardless of the PSI support bit and the MAMV field in the CAP_REG. Yes that's exactly what I wanted to ask... Let me try again. I thought VTD_MAMV was only for 2nd level page table, not for pasid-iotlb invalidations. So I think we should remove this "if" check (that corresponds to "we should even support larger AM"), right? -- Peter Xu