Re: [PATCH 1/1] KVM: pass through CPUID(0x80000006)

[Sean Christopherson <sean.j.christopherson@intel.com>]

On Tue, Apr 14, 2020 at 06:23:20PM -0700, Jon Cargille wrote:
> From: Eric Northup <digitaleric@gmail.com>
> 
> Return L2 cache and TLB information to guests.
> They could have been set before, but the defaults that KVM returns will be
> necessary for usermode that doesn't supply their own CPUID tables.

I don't follow the changelog.  The code makes sense, but I don't understand
the justification.  This only affects KVM_GET_SUPPORTED_CPUID, i.e. what's
advertised to userspace, it doesn't directly change CPUID emulation in any
way.  The "They could have been set before" blurb is especially confusing.

I assume you want to say something like:

  Return the host's L2 cache and TLB information for CPUID.0x80000006
  instead of zeroing out the entry as part of KVM_GET_SUPPORTED_CPUID.
  This allows a userspace VMM to feed KVM_GET_SUPPORTED_CPUID's output
  directly into KVM_SET_CPUID2 (without breaking the guest).

> Signed-off-by: Eric Northup <digitaleric@google.com>
> Signed-off-by: Eric Northup <digitaleric@gmail.com>
> Signed-off-by: Jon Cargille <jcargill@google.com>
> Signed-off-by: Jim Mattson <jmattson@google.com>

Jim's tag is unnecessary, unless he was a middleman between Eric and Jon,
in which case Jim's tag should also come between Eric's and Jon's.

Only one of Eric's signoffs is needed (the one that matches the From: tag,
i.e. is the official author).  I'm guessing Google would prefer the author
to be the @google.com address.

> ---
>  arch/x86/kvm/cpuid.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index b1c469446b072..4a8d67303a42c 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -734,6 +734,9 @@ static inline int __do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 function,
>  		entry->ecx &= kvm_cpuid_8000_0001_ecx_x86_features;
>  		cpuid_mask(&entry->ecx, CPUID_8000_0001_ECX);
>  		break;
> +	case 0x80000006:
> +		/* L2 cache and TLB: pass through host info. */
> +		break;
>  	case 0x80000007: /* Advanced power management */
>  		/* invariant TSC is CPUID.80000007H:EDX[8] */
>  		entry->edx &= (1 << 8);
> -- 
> 2.25.1.481.gfbce0eb801-goog
>