From: Peter Zijlstra <peterz@infradead.org>
To: Like Xu <like.xu@linux.intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <sean.j.christopherson@intel.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
wei.w.wang@intel.com, ak@linux.intel.com
Subject: Re: [PATCH v10 08/11] KVM: x86/pmu: Add LBR feature emulation via guest LBR event
Date: Fri, 24 Apr 2020 14:16:26 +0200 [thread overview]
Message-ID: <20200424121626.GB20730@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20200423081412.164863-9-like.xu@linux.intel.com>
On Thu, Apr 23, 2020 at 04:14:09PM +0800, Like Xu wrote:
> +static int intel_pmu_create_lbr_event(struct kvm_vcpu *vcpu)
> +{
> + struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
> + struct perf_event *event;
> +
> + /*
> + * The perf_event_attr is constructed in the minimum efficient way:
> + * - set 'pinned = true' to make it task pinned so that if another
> + * cpu pinned event reclaims LBR, the event->oncpu will be set to -1;
> + *
> + * - set 'sample_type = PERF_SAMPLE_BRANCH_STACK' and
> + * 'exclude_host = true' to mark it as a guest LBR event which
> + * indicates host perf to schedule it without but a fake counter,
> + * check is_guest_lbr_event() and intel_guest_event_constraints();
> + *
> + * - set 'branch_sample_type = PERF_SAMPLE_BRANCH_CALL_STACK |
> + * PERF_SAMPLE_BRANCH_USER' to configure it to use callstack mode,
> + * which allocs 'ctx->task_ctx_data' and request host perf subsystem
> + * to save/restore guest LBR records during host context switches,
> + * check branch_user_callstack() and intel_pmu_lbr_sched_task();
> + */
> + struct perf_event_attr attr = {
> + .type = PERF_TYPE_RAW,
This is not right; this needs a .config
And I suppose that is why you need that horrible:
needs_guest_lbr_without_counter() thing to begin with.
Please allocate yourself an event from the pseudo event range:
event==0x00. Currently we only have umask==3 for Fixed2 and umask==4
for Fixed3, given you claim 58, which is effectively Fixed25,
umask==0x1a might be appropriate.
Also, I suppose we need to claim 0x0000 as an error, so that other
people won't try this again.
> + .size = sizeof(attr),
> + .pinned = true,
> + .exclude_host = true,
> + .sample_type = PERF_SAMPLE_BRANCH_STACK,
> + .branch_sample_type = PERF_SAMPLE_BRANCH_CALL_STACK |
> + PERF_SAMPLE_BRANCH_USER,
> + };
> +
> + if (unlikely(pmu->lbr_event))
> + return 0;
> +
> + event = perf_event_create_kernel_counter(&attr, -1,
> + current, NULL, NULL);
> + if (IS_ERR(event)) {
> + pr_debug_ratelimited("%s: failed %ld\n",
> + __func__, PTR_ERR(event));
> + return -ENOENT;
> + }
> + pmu->lbr_event = event;
> + pmu->event_count++;
> + return 0;
> +}
Also, what happens if you fail programming due to a conflicting cpu
event? That pinned doesn't guarantee you'll get the event, it just means
you'll error instead of getting RR.
I didn't find any code checking the event state.
next prev parent reply other threads:[~2020-04-24 12:17 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-23 8:14 [PATCH v10 00/11] Guest Last Branch Recording Enabling Like Xu
2020-04-23 8:14 ` [PATCH v10 01/11] perf/x86: Fix variable type for LBR registers Like Xu
2020-04-23 8:14 ` [PATCH v10 02/11] perf/x86/core: Refactor hw->idx checks and cleanup Like Xu
2020-04-23 8:14 ` [PATCH v10 03/11] perf/x86/lbr: Add interface to get basic information about LBR stack Like Xu
2020-04-23 8:14 ` [PATCH v10 04/11] perf/x86: Add constraint to create guest LBR event without hw counter Like Xu
2020-04-23 8:14 ` [PATCH v10 05/11] perf/x86: Keep LBR stack unchanged in host context for guest LBR event Like Xu
2020-04-23 8:14 ` [PATCH v10 06/11] KVM: x86: Add KVM_CAP_X86_GUEST_LBR to dis/enable LBR from user-space Like Xu
2020-04-23 8:14 ` [PATCH v10 07/11] KVM: x86/pmu: Tweak kvm_pmu_get_msr to pass 'struct msr_data' in Like Xu
2020-04-23 8:14 ` [PATCH v10 08/11] KVM: x86/pmu: Add LBR feature emulation via guest LBR event Like Xu
2020-04-24 12:16 ` Peter Zijlstra [this message]
2020-04-27 3:16 ` Like Xu
2020-05-08 8:48 ` Like Xu
2020-05-08 13:09 ` Peter Zijlstra
2020-05-12 4:58 ` Xu, Like
2020-04-23 8:14 ` [PATCH v10 09/11] KVM: x86/pmu: Release guest LBR event via vPMU lazy release mechanism Like Xu
2020-04-28 5:06 ` kbuild test robot
2020-04-28 5:06 ` [RFC PATCH] KVM: x86/pmu: kvm_pmu_lbr_cleanup() can be static kbuild test robot
2020-04-23 8:14 ` [PATCH v10 10/11] KVM: x86: Expose MSR_IA32_PERF_CAPABILITIES for LBR record format Like Xu
2020-04-23 8:14 ` [PATCH v10 11/11] KVM: x86: Remove the common trap handler of the MSR_IA32_DEBUGCTLMSR Like Xu
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