From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Vitaly Kuznetsov <vkuznets@redhat.com>
Cc: Wanpeng Li <kernellwp@gmail.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
Paolo Bonzini <pbonzini@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>
Subject: Re: [PATCH 1/2] KVM: LAPIC: Prevent setting the tscdeadline timer if the lapic is hw disabled
Date: Tue, 21 Jul 2020 08:25:19 -0700 [thread overview]
Message-ID: <20200721152519.GB22083@linux.intel.com> (raw)
In-Reply-To: <87o8o9p356.fsf@vitty.brq.redhat.com>
On Tue, Jul 21, 2020 at 12:35:01PM +0200, Vitaly Kuznetsov wrote:
> Wanpeng Li <kernellwp@gmail.com> writes:
>
> > From: Wanpeng Li <wanpengli@tencent.com>
> >
> > Prevent setting the tscdeadline timer if the lapic is hw disabled.
> >
> > Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
A Fixes and/or Cc stable is probably needed for this.
> > ---
> > arch/x86/kvm/lapic.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> > index 5bf72fc..4ce2ddd 100644
> > --- a/arch/x86/kvm/lapic.c
> > +++ b/arch/x86/kvm/lapic.c
> > @@ -2195,7 +2195,7 @@ void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data)
> > {
> > struct kvm_lapic *apic = vcpu->arch.apic;
> >
> > - if (!lapic_in_kernel(vcpu) || apic_lvtt_oneshot(apic) ||
> > + if (!kvm_apic_present(vcpu) || apic_lvtt_oneshot(apic) ||
> > apic_lvtt_period(apic))
> > return;
>
> Out of pure curiosity, what is the architectural behavior if I disable
> LAPIC, write to IA32_TSC_DEADLINE and then re-enable LAPIC before the
> timer was supposed to fire?
Intel's SDM reserves the right for the CPU to do whatever it wants :-)
When IA32_APIC_BASE[11] is set to 0, prior initialization to the APIC
may be lost and the APIC may return to the state described in Section
10.4.7.1, “Local APIC State After Power-Up or Reset.”
Practically speaking, resetting APIC state seems like the sane approach,
i.e. KVM should probably call kvm_lapic_reset() when the APIC transitions
from HW enabled -> disabled. Maybe in a follow-up patch to this one?
next prev parent reply other threads:[~2020-07-21 15:25 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-21 9:24 [PATCH 1/2] KVM: LAPIC: Prevent setting the tscdeadline timer if the lapic is hw disabled Wanpeng Li
2020-07-21 9:24 ` [PATCH 2/2] KVM: LAPIC: Set the TDCR settable bits Wanpeng Li
2020-07-21 10:51 ` Vitaly Kuznetsov
2020-07-27 3:29 ` Wanpeng Li
2020-07-21 10:35 ` [PATCH 1/2] KVM: LAPIC: Prevent setting the tscdeadline timer if the lapic is hw disabled Vitaly Kuznetsov
2020-07-21 15:25 ` Sean Christopherson [this message]
2020-07-27 6:18 ` Wanpeng Li
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