[PATCH v6 31/76] x86/head/64: Setup MSR_GS_BASE before calling into C code

Joerg Roedel
2020-08-24T08:56:12Z

From: Joerg Roedel <jroedel@suse.de>

When stack-protector is enabled a valid GS_BASE is needed before
calling any C code function, because the stack canary is loaded from
per-cpu data.

Signed-off-by: Joerg Roedel <jroedel@suse.de>
Reviewed-by: Kees Cook <keescook@chromium.org>
Link: https://lore.kernel.org/r/20200724160336.5435-31-joro@8bytes.org
---
arch/x86/kernel/head64.c | 7 +++++++
arch/x86/kernel/head_64.S | 8 ++++++++
2 files changed, 15 insertions(+)

diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 8c82be44be94..b0ab5627900b 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -36,6 +36,7 @@
#include <asm/microcode.h>
#include <asm/kasan.h>
#include <asm/fixmap.h>
+#include <asm/realmode.h>

/*
* Manage page tables very early on.
@@ -513,6 +514,8 @@ void __init x86_64_start_reservations(char *real_mode_data)
*/
void __head startup_64_setup_env(unsigned long physbase)
{
+ unsigned long gsbase;
+
/* Load GDT */
startup_gdt_descr.address = (unsigned long)fixup_pointer(startup_gdt, physbase);
native_load_gdt(&startup_gdt_descr);
@@ -521,4 +524,8 @@ void __head startup_64_setup_env(unsigned long physbase)
asm volatile("movl %%eax, %%ds\n"
"movl %%eax, %%ss\n"
"movl %%eax, %%es\n" : : "a"(__KERNEL_DS) : "memory");
+
+ /* Setup GS_BASE - needed for stack protector */
+ gsbase = (unsigned long)fixup_pointer((void *)initial_gs, physbase);
+ __wrmsr(MSR_GS_BASE, (u32)gsbase, (u32)(gsbase >> 32));
}
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 2b2e91627221..800053219054 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -78,6 +78,14 @@ SYM_CODE_START_NOALIGN(startup_64)
call startup_64_setup_env
popq %rsi

+ /*
+ * Setup %gs here already to make stack-protector work - it needs to be
+ * setup again after the switch to kernel addresses. The address read
+ * from initial_gs is a kernel address, so it needs to be adjusted first
+ * for the identity mapping.
+ */
+ movl $MSR_GS_BASE,%ecx
+
/* Now switch to __KERNEL_CS so IRET works reliably */
pushq $__KERNEL_CS
leaq .Lon_kernel_cs(%rip), %rax
--
2.28.0