Re: [PATCH 05/11] exec: add debug version of physical memory read and write API

Dov Murik
2020-11-24T05:43:10Z

On 16/11/2020 20:51, Ashish Kalra wrote:
> From: Brijesh Singh <brijesh.singh@amd.com>
>
> Adds the following new APIs
> - cpu_physical_memory_read_debug
> - cpu_physical_memory_write_debug
> - cpu_physical_memory_rw_debug
> - ldl_phys_debug
> - ldq_phys_debug
>
> The subsequent patch will make use of the API introduced, to ensure
> that the page table walks are handled correctly when debugging an
> SEV guest.
>
> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
> Signed-off-by: Ashish Kalra <ashish.kalra@amd.com>
> ---

[...]

> diff --git a/softmmu/physmem.c b/softmmu/physmem.c
> index 2c08624ca8..6945bd5efe 100644
> --- a/softmmu/physmem.c
> +++ b/softmmu/physmem.c
> @@ -3354,6 +3354,53 @@ inline MemTxResult address_space_write_rom_debug(AddressSpace *as,
> return MEMTX_OK;
> }
>
> +uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr)
> +{
> + MemTxAttrs attrs;
> + int asidx = cpu_asidx_from_attrs(cpu, attrs);
> + uint32_t val;
> +
> + /* set debug attrs to indicate memory access is from the debugger */
> + attrs.debug = 1;
> +
> + debug_ops->read(cpu->cpu_ases[asidx].as, addr, attrs,
> + (void *) &val, 4);
> +
> + return tswap32(val);
> +}
> +
> +uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr)
> +{
> + MemTxAttrs attrs;
> + int asidx = cpu_asidx_from_attrs(cpu, attrs);
> + uint64_t val;
> +
> + /* set debug attrs to indicate memory access is from the debugger */
> + attrs.debug = 1;
> +
> + debug_ops->read(cpu->cpu_ases[asidx].as, addr, attrs,
> + (void *) &val, 8);
> + return val;

You probably want tswap64(val) here like in ldl_phys_debug (even though
I assume it's a noop in the SEV case).

> +}
> +
> +void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf,
> + int len, int is_write)
> +{
> + MemTxAttrs attrs;
> +
> + /* set debug attrs to indicate memory access is from the debugger */
> + attrs.debug = 1;

Maybe:

MemTxAttrs attrs = { .debug = 1 };

(Also in the functions above.)

> +
> + if (is_write) {
> + debug_ops->write(&address_space_memory, addr,
> + attrs, buf, len);
> + } else {
> + debug_ops->read(&address_space_memory, addr,
> + attrs, buf, len);
> + }
> +
> +}
> +
> int64_t address_space_cache_init(MemoryRegionCache *cache,
> AddressSpace *as,
> hwaddr addr,
>