From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F927C43619 for ; Mon, 8 Mar 2021 14:34:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1E96A651B9 for ; Mon, 8 Mar 2021 14:34:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230458AbhCHOd7 (ORCPT ); Mon, 8 Mar 2021 09:33:59 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:13438 "EHLO mx0b-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229899AbhCHOdu (ORCPT ); Mon, 8 Mar 2021 09:33:50 -0500 Received: from pps.filterd (m0127361.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 128EXMJk080937; Mon, 8 Mar 2021 09:33:49 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=H74DNPPZhiOVo9/mhC8bTMJYDfZbEG98PeT4m6XVj5g=; b=SRxXwkssWbYMfU7gAJo+e/hjyv8WH2Xr0L3JGKCXuQHSzsXFFnIov5Y3qS7LJZYRqawP HGZUX0OjjaAiQDnvPifSBanS6BG3z6j9QbeYYmJ96gNivvzrfcownC/WReqG4wzH9oDp BOg518ElKXYMI4OczKn0K56FCPIDApRhgrRlZXNcPpYMHGAyJrwz49wp09F5V5d+kWj6 T4cxI6hVQDN3PscvKtIGR1HZ6Gq+n9CvwRU1jOxt9jn+JimZlyuTcbvbG5YR5bPsha1+ 00zSLizn/1tLTAcUpFP9ppEuH9s9BPVolTjy3fLYtip6S3L/cxIuOT3jE90tVfA61QY1 bQ== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com with ESMTP id 375ns2r241-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 08 Mar 2021 09:33:49 -0500 Received: from m0127361.ppops.net (m0127361.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.43/8.16.0.43) with SMTP id 128EXmNw083086; Mon, 8 Mar 2021 09:33:48 -0500 Received: from ppma04ams.nl.ibm.com (63.31.33a9.ip4.static.sl-reverse.com [169.51.49.99]) by mx0a-001b2d01.pphosted.com with ESMTP id 375ns2r239-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 08 Mar 2021 09:33:48 -0500 Received: from pps.filterd (ppma04ams.nl.ibm.com [127.0.0.1]) by ppma04ams.nl.ibm.com (8.16.0.42/8.16.0.42) with SMTP id 128EW1xE011285; Mon, 8 Mar 2021 14:33:46 GMT Received: from b06cxnps4075.portsmouth.uk.ibm.com (d06relay12.portsmouth.uk.ibm.com [9.149.109.197]) by ppma04ams.nl.ibm.com with ESMTP id 3741c8hw9s-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 08 Mar 2021 14:33:46 +0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 128EXhP845678982 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 8 Mar 2021 14:33:44 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C9FE8A4053; Mon, 8 Mar 2021 14:33:43 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5FC53A404D; Mon, 8 Mar 2021 14:33:43 +0000 (GMT) Received: from fedora.fritz.box (unknown [9.145.7.187]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 8 Mar 2021 14:33:43 +0000 (GMT) From: Janosch Frank To: pbonzini@redhat.com Cc: kvm@vger.kernel.org, frankja@linux.ibm.com, david@redhat.com, borntraeger@de.ibm.com, cohuck@redhat.com, linux-s390@vger.kernel.org, imbrenda@linux.ibm.com Subject: [kvm-unit-tests GIT PULL 13/16] s390x: Remove SAVE/RESTORE_STACK and lowcore fpc and fprs save areas Date: Mon, 8 Mar 2021 15:31:44 +0100 Message-Id: <20210308143147.64755-14-frankja@linux.ibm.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210308143147.64755-1-frankja@linux.ibm.com> References: <20210308143147.64755-1-frankja@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.761 definitions=2021-03-08_08:2021-03-08,2021-03-08 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 malwarescore=0 adultscore=0 phishscore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 priorityscore=1501 spamscore=0 mlxlogscore=999 impostorscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103080080 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org There are no more users. At the same time remove sw_int_fpc and sw_int_frps plus their asm offsets macros since they are also unused now. Signed-off-by: Janosch Frank Reviewed-by: Claudio Imbrenda Reviewed-by: Pierre Morel Reviewed-by: Thomas Huth --- lib/s390x/asm-offsets.c | 2 -- lib/s390x/asm/arch_def.h | 4 +--- s390x/macros.S | 29 ----------------------------- 3 files changed, 1 insertion(+), 34 deletions(-) diff --git a/lib/s390x/asm-offsets.c b/lib/s390x/asm-offsets.c index 2658b59a..fbea3278 100644 --- a/lib/s390x/asm-offsets.c +++ b/lib/s390x/asm-offsets.c @@ -54,8 +54,6 @@ int main(void) OFFSET(GEN_LC_MCCK_NEW_PSW, lowcore, mcck_new_psw); OFFSET(GEN_LC_IO_NEW_PSW, lowcore, io_new_psw); OFFSET(GEN_LC_SW_INT_GRS, lowcore, sw_int_grs); - OFFSET(GEN_LC_SW_INT_FPRS, lowcore, sw_int_fprs); - OFFSET(GEN_LC_SW_INT_FPC, lowcore, sw_int_fpc); OFFSET(GEN_LC_SW_INT_CRS, lowcore, sw_int_crs); OFFSET(GEN_LC_SW_INT_PSW, lowcore, sw_int_psw); OFFSET(GEN_LC_MCCK_EXT_SA_ADDR, lowcore, mcck_ext_sa_addr); diff --git a/lib/s390x/asm/arch_def.h b/lib/s390x/asm/arch_def.h index b8e9fe40..76cb7b33 100644 --- a/lib/s390x/asm/arch_def.h +++ b/lib/s390x/asm/arch_def.h @@ -103,9 +103,7 @@ struct lowcore { struct psw io_new_psw; /* 0x01f0 */ /* sw definition: save area for registers in interrupt handlers */ uint64_t sw_int_grs[16]; /* 0x0200 */ - uint64_t sw_int_fprs[16]; /* 0x0280 */ - uint32_t sw_int_fpc; /* 0x0300 */ - uint8_t pad_0x0304[0x0308 - 0x0304]; /* 0x0304 */ + uint8_t pad_0x0280[0x0308 - 0x0280]; /* 0x0280 */ uint64_t sw_int_crs[16]; /* 0x0308 */ struct psw sw_int_psw; /* 0x0388 */ uint8_t pad_0x0310[0x11b0 - 0x0398]; /* 0x0398 */ diff --git a/s390x/macros.S b/s390x/macros.S index d4f41ec4..13cff299 100644 --- a/s390x/macros.S +++ b/s390x/macros.S @@ -33,35 +33,6 @@ lpswe \old_psw .endm - .macro SAVE_REGS - /* save grs 0-15 */ - stmg %r0, %r15, GEN_LC_SW_INT_GRS - /* save crs 0-15 */ - stctg %c0, %c15, GEN_LC_SW_INT_CRS - /* load a cr0 that has the AFP control bit which enables all FPRs */ - larl %r1, initial_cr0 - lctlg %c0, %c0, 0(%r1) - /* save fprs 0-15 + fpc */ - la %r1, GEN_LC_SW_INT_FPRS - .irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 - std \i, \i * 8(%r1) - .endr - stfpc GEN_LC_SW_INT_FPC - .endm - - .macro RESTORE_REGS - /* restore fprs 0-15 + fpc */ - la %r1, GEN_LC_SW_INT_FPRS - .irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 - ld \i, \i * 8(%r1) - .endr - lfpc GEN_LC_SW_INT_FPC - /* restore crs 0-15 */ - lctlg %c0, %c15, GEN_LC_SW_INT_CRS - /* restore grs 0-15 */ - lmg %r0, %r15, GEN_LC_SW_INT_GRS - .endm - /* Save registers on the stack (r15), so we can have stacked interrupts. */ .macro SAVE_REGS_STACK /* Allocate a full stack frame */ -- 2.29.2