From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED29BC43381 for ; Sun, 14 Mar 2021 16:01:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BC68264EB6 for ; Sun, 14 Mar 2021 16:01:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234433AbhCNQBU (ORCPT ); Sun, 14 Mar 2021 12:01:20 -0400 Received: from mga14.intel.com ([192.55.52.115]:7167 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234084AbhCNQAl (ORCPT ); Sun, 14 Mar 2021 12:00:41 -0400 IronPort-SDR: 5eify48Z8X5OF3prqzd2r/VHWY5NZ6JFje9ZpSLxjBLqj1olQiRy3eoztMF9YOgNHbJcbMdX4T ApHl1RMP8U9A== X-IronPort-AV: E=McAfee;i="6000,8403,9923"; a="188360710" X-IronPort-AV: E=Sophos;i="5.81,248,1610438400"; d="scan'208";a="188360710" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Mar 2021 09:00:41 -0700 IronPort-SDR: /yMyRBRGR4Vpgh6BZ9zovdu5j0jz2bgr6jVwT9pKHuA999m+vvxSXxV6LW/KaK8xJAJq/w4VIW h+YRFCvoT4mA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,248,1610438400"; d="scan'208";a="439530667" Received: from clx-ap-likexu.sh.intel.com ([10.239.48.108]) by FMSMGA003.fm.intel.com with ESMTP; 14 Mar 2021 09:00:38 -0700 From: Like Xu To: Paolo Bonzini , Sean Christopherson Cc: Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, x86@kernel.org, wei.w.wang@intel.com, linux-kernel@vger.kernel.org, Like Xu , Kan Liang , Peter Zijlstra , Borislav Petkov , Ingo Molnar Subject: [PATCH v4 05/11] perf/x86: Move ARCH_LBR_CTL_MASK definition to include/asm/msr-index.h Date: Sun, 14 Mar 2021 23:52:18 +0800 Message-Id: <20210314155225.206661-6-like.xu@linux.intel.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210314155225.206661-1-like.xu@linux.intel.com> References: <20210314155225.206661-1-like.xu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The ARCH_LBR_CTL_MASK will be reused for LBR emulation in the KVM. Cc: Kan Liang Cc: Peter Zijlstra Cc: Borislav Petkov Cc: Ingo Molnar Signed-off-by: Like Xu --- arch/x86/events/intel/lbr.c | 2 -- arch/x86/include/asm/msr-index.h | 1 + 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c index 237876733e12..f60339ff0c13 100644 --- a/arch/x86/events/intel/lbr.c +++ b/arch/x86/events/intel/lbr.c @@ -168,8 +168,6 @@ enum { ARCH_LBR_RETURN |\ ARCH_LBR_OTHER_BRANCH) -#define ARCH_LBR_CTL_MASK 0x7f000e - static void intel_pmu_lbr_filter(struct cpu_hw_events *cpuc); static __always_inline bool is_lbr_call_stack_bit_set(u64 config) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 546d6ecf0a35..8f3375961efc 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -169,6 +169,7 @@ #define LBR_INFO_BR_TYPE (0xfull << LBR_INFO_BR_TYPE_OFFSET) #define MSR_ARCH_LBR_CTL 0x000014ce +#define ARCH_LBR_CTL_MASK 0x7f000e #define ARCH_LBR_CTL_LBREN BIT(0) #define ARCH_LBR_CTL_CPL_OFFSET 1 #define ARCH_LBR_CTL_CPL (0x3ull << ARCH_LBR_CTL_CPL_OFFSET) -- 2.29.2