From: Sean Christopherson <seanjc@google.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, Sean Christopherson <seanjc@google.com>
Subject: [kvm-unit-tests PATCH 06/14] x86: msr: Replace spaces with tabs in all of msr.c
Date: Wed, 21 Apr 2021 20:04:56 -0700 [thread overview]
Message-ID: <20210422030504.3488253-7-seanjc@google.com> (raw)
In-Reply-To: <20210422030504.3488253-1-seanjc@google.com>
The bulk of msr.c is about to get rewritten, replace spaces with tabs so
the upcoming changes don't have to propagate the existing indentation,
which is a royal pain for folks whose setup assumes kernel coding style.
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
x86/msr.c | 167 +++++++++++++++++++++++++++---------------------------
1 file changed, 83 insertions(+), 84 deletions(-)
diff --git a/x86/msr.c b/x86/msr.c
index 5a3f1c3..1589b3b 100644
--- a/x86/msr.c
+++ b/x86/msr.c
@@ -5,13 +5,13 @@
#include "msr.h"
struct msr_info {
- int index;
- const char *name;
- struct tc {
- int valid;
- unsigned long long value;
- unsigned long long expected;
- } val_pairs[20];
+ int index;
+ const char *name;
+ struct tc {
+ int valid;
+ unsigned long long value;
+ unsigned long long expected;
+ } val_pairs[20];
};
@@ -20,98 +20,97 @@ struct msr_info {
struct msr_info msr_info[] =
{
- { .index = 0x00000174, .name = "IA32_SYSENTER_CS",
- .val_pairs = {{ .valid = 1, .value = 0x1234, .expected = 0x1234}}
- },
- { .index = 0x00000175, .name = "MSR_IA32_SYSENTER_ESP",
- .val_pairs = {{ .valid = 1, .value = addr_ul, .expected = addr_ul}}
- },
- { .index = 0x00000176, .name = "IA32_SYSENTER_EIP",
- .val_pairs = {{ .valid = 1, .value = addr_ul, .expected = addr_ul}}
- },
- { .index = 0x000001a0, .name = "MSR_IA32_MISC_ENABLE",
- // reserved: 1:2, 4:6, 8:10, 13:15, 17, 19:21, 24:33, 35:63
- .val_pairs = {{ .valid = 1, .value = 0x400c51889, .expected = 0x400c51889}}
- },
- { .index = 0x00000277, .name = "MSR_IA32_CR_PAT",
- .val_pairs = {{ .valid = 1, .value = 0x07070707, .expected = 0x07070707}}
- },
+ { .index = 0x00000174, .name = "IA32_SYSENTER_CS",
+ .val_pairs = {{ .valid = 1, .value = 0x1234, .expected = 0x1234}}
+ },
+ { .index = 0x00000175, .name = "MSR_IA32_SYSENTER_ESP",
+ .val_pairs = {{ .valid = 1, .value = addr_ul, .expected = addr_ul}}
+ },
+ { .index = 0x00000176, .name = "IA32_SYSENTER_EIP",
+ .val_pairs = {{ .valid = 1, .value = addr_ul, .expected = addr_ul}}
+ },
+ { .index = 0x000001a0, .name = "MSR_IA32_MISC_ENABLE",
+ // reserved: 1:2, 4:6, 8:10, 13:15, 17, 19:21, 24:33, 35:63
+ .val_pairs = {{ .valid = 1, .value = 0x400c51889, .expected = 0x400c51889}}
+ },
+ { .index = 0x00000277, .name = "MSR_IA32_CR_PAT",
+ .val_pairs = {{ .valid = 1, .value = 0x07070707, .expected = 0x07070707}}
+ },
#ifdef __x86_64__
- { .index = 0xc0000100, .name = "MSR_FS_BASE",
- .val_pairs = {{ .valid = 1, .value = addr_64, .expected = addr_64}}
- },
- { .index = 0xc0000101, .name = "MSR_GS_BASE",
- .val_pairs = {{ .valid = 1, .value = addr_64, .expected = addr_64}}
- },
- { .index = 0xc0000102, .name = "MSR_KERNEL_GS_BASE",
- .val_pairs = {{ .valid = 1, .value = addr_64, .expected = addr_64}}
- },
- { .index = 0xc0000080, .name = "MSR_EFER",
- .val_pairs = {{ .valid = 1, .value = 0xD00, .expected = 0xD00}}
- },
- { .index = 0xc0000082, .name = "MSR_LSTAR",
- .val_pairs = {{ .valid = 1, .value = addr_64, .expected = addr_64}}
- },
- { .index = 0xc0000083, .name = "MSR_CSTAR",
- .val_pairs = {{ .valid = 1, .value = addr_64, .expected = addr_64}}
- },
- { .index = 0xc0000084, .name = "MSR_SYSCALL_MASK",
- .val_pairs = {{ .valid = 1, .value = 0xffffffff, .expected = 0xffffffff}}
- },
+ { .index = 0xc0000100, .name = "MSR_FS_BASE",
+ .val_pairs = {{ .valid = 1, .value = addr_64, .expected = addr_64}}
+ },
+ { .index = 0xc0000101, .name = "MSR_GS_BASE",
+ .val_pairs = {{ .valid = 1, .value = addr_64, .expected = addr_64}}
+ },
+ { .index = 0xc0000102, .name = "MSR_KERNEL_GS_BASE",
+ .val_pairs = {{ .valid = 1, .value = addr_64, .expected = addr_64}}
+ },
+ { .index = 0xc0000080, .name = "MSR_EFER",
+ .val_pairs = {{ .valid = 1, .value = 0xD00, .expected = 0xD00}}
+ },
+ { .index = 0xc0000082, .name = "MSR_LSTAR",
+ .val_pairs = {{ .valid = 1, .value = addr_64, .expected = addr_64}}
+ },
+ { .index = 0xc0000083, .name = "MSR_CSTAR",
+ .val_pairs = {{ .valid = 1, .value = addr_64, .expected = addr_64}}
+ },
+ { .index = 0xc0000084, .name = "MSR_SYSCALL_MASK",
+ .val_pairs = {{ .valid = 1, .value = 0xffffffff, .expected = 0xffffffff}}
+ },
#endif
-// MSR_IA32_DEBUGCTLMSR needs svm feature LBRV
-// MSR_VM_HSAVE_PA only AMD host
+// MSR_IA32_DEBUGCTLMSR needs svm feature LBRV
+// MSR_VM_HSAVE_PA only AMD host
};
static int find_msr_info(int msr_index)
{
- int i;
- for (i = 0; i < sizeof(msr_info)/sizeof(msr_info[0]) ; i++) {
- if (msr_info[i].index == msr_index) {
- return i;
- }
- }
- return -1;
+ int i;
+
+ for (i = 0; i < sizeof(msr_info)/sizeof(msr_info[0]) ; i++) {
+ if (msr_info[i].index == msr_index)
+ return i;
+ }
+ return -1;
}
static void test_msr_rw(int msr_index, unsigned long long input, unsigned long long expected)
{
- unsigned long long r, orig;
- int index;
- const char *sptr;
- if ((index = find_msr_info(msr_index)) != -1) {
- sptr = msr_info[index].name;
- } else {
- printf("couldn't find name for msr # %#x, skipping\n", msr_index);
- return;
- }
+ unsigned long long r, orig;
+ int index;
+ const char *sptr;
- orig = rdmsr(msr_index);
- wrmsr(msr_index, input);
- r = rdmsr(msr_index);
- wrmsr(msr_index, orig);
- if (expected != r) {
- printf("testing %s: output = %#" PRIx32 ":%#" PRIx32
- " expected = %#" PRIx32 ":%#" PRIx32 "\n", sptr,
- (u32)(r >> 32), (u32)r, (u32)(expected >> 32), (u32)expected);
- }
- report(expected == r, "%s", sptr);
+ if ((index = find_msr_info(msr_index)) != -1) {
+ sptr = msr_info[index].name;
+ } else {
+ printf("couldn't find name for msr # %#x, skipping\n", msr_index);
+ return;
+ }
+ orig = rdmsr(msr_index);
+ wrmsr(msr_index, input);
+ r = rdmsr(msr_index);
+ wrmsr(msr_index, orig);
+ if (expected != r) {
+ printf("testing %s: output = %#" PRIx32 ":%#" PRIx32
+ " expected = %#" PRIx32 ":%#" PRIx32 "\n", sptr,
+ (u32)(r >> 32), (u32)r, (u32)(expected >> 32), (u32)expected);
+ }
+ report(expected == r, "%s", sptr);
}
int main(int ac, char **av)
{
- int i, j;
- for (i = 0 ; i < sizeof(msr_info) / sizeof(msr_info[0]); i++) {
- for (j = 0; j < sizeof(msr_info[i].val_pairs) / sizeof(msr_info[i].val_pairs[0]); j++) {
- if (msr_info[i].val_pairs[j].valid) {
- test_msr_rw(msr_info[i].index, msr_info[i].val_pairs[j].value, msr_info[i].val_pairs[j].expected);
- } else {
- break;
- }
- }
- }
+ int i, j;
+ for (i = 0 ; i < sizeof(msr_info) / sizeof(msr_info[0]); i++) {
+ for (j = 0; j < sizeof(msr_info[i].val_pairs) / sizeof(msr_info[i].val_pairs[0]); j++) {
+ if (msr_info[i].val_pairs[j].valid) {
+ test_msr_rw(msr_info[i].index, msr_info[i].val_pairs[j].value, msr_info[i].val_pairs[j].expected);
+ } else {
+ break;
+ }
+ }
+ }
- return report_summary();
+ return report_summary();
}
-
--
2.31.1.498.g6c1eba8ee3d-goog
next prev parent reply other threads:[~2021-04-22 3:05 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-22 3:04 [kvm-unit-tests PATCH 00/14] x86: MSR_GS_BASE and friends Sean Christopherson
2021-04-22 3:04 ` [kvm-unit-tests PATCH 01/14] x86/cstart: Don't use MSR_GS_BASE in 32-bit boot code Sean Christopherson
2021-04-22 9:44 ` Paolo Bonzini
2021-04-22 10:02 ` Paolo Bonzini
2021-04-22 17:57 ` Sean Christopherson
2021-04-23 6:57 ` Paolo Bonzini
2021-04-22 3:04 ` [kvm-unit-tests PATCH 02/14] x86: msr: Exclude GS/FS_BASE MSRs from 32-bit builds Sean Christopherson
2021-04-22 3:04 ` [kvm-unit-tests PATCH 03/14] x86: msr: Advertise GenuineIntel as vendor to play nice with SYSENTER Sean Christopherson
2021-04-22 10:11 ` Paolo Bonzini
2021-04-22 3:04 ` [kvm-unit-tests PATCH 04/14] x86: msr: Restore original MSR value after writing arbitrary test value Sean Christopherson
2021-04-22 3:04 ` [kvm-unit-tests PATCH 05/14] x86: Force the compiler to retrieve exception info from per-cpu area Sean Christopherson
2021-04-22 3:04 ` Sean Christopherson [this message]
2021-04-22 3:04 ` [kvm-unit-tests PATCH 07/14] x86: msr: Use ARRAY_SIZE() instead of open coded equivalent Sean Christopherson
2021-04-22 3:04 ` [kvm-unit-tests PATCH 08/14] x86: msr: Use the #defined MSR indices in favor of open coding the values Sean Christopherson
2021-04-22 3:04 ` [kvm-unit-tests PATCH 09/14] x86: msr: Drop the explicit expected value Sean Christopherson
2021-04-22 3:05 ` [kvm-unit-tests PATCH 10/14] x86: msr: Add builder macros to define MSR entries Sean Christopherson
2021-04-22 3:05 ` [kvm-unit-tests PATCH 11/14] x86: msr: Pass msr_info instead of doing a lookup at runtime Sean Christopherson
2021-04-22 3:05 ` [kvm-unit-tests PATCH 12/14] x86: msr: Verify 64-bit only MSRs fault on 32-bit hosts Sean Christopherson
2021-04-22 10:32 ` Paolo Bonzini
2021-04-22 3:05 ` [kvm-unit-tests PATCH 13/14] x86: msr: Test that always-canonical MSRs #GP on non-canonical value Sean Christopherson
2021-04-22 3:05 ` [kvm-unit-tests PATCH 14/14] x86: msr: Verify that EFER.SCE can be written on 32-bit vCPUs Sean Christopherson
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