[PATCH v1 0/3] SVM 5-level page table support

Wei Huang
2021-08-05T20:55:15Z

This patch set adds 5-level page table support for AMD SVM. When the
5-level page table is enabled on host OS, the nested page table for guest
VMs will use the same format as host OS (i.e. 5-level NPT). These patches
were tested with various combination of different settings (nested/regular
VMs, AMD64/i686 kernels, etc.)

Thanks,
-Wei

Wei Huang (3):
KVM: x86: Convert TDP level calculation to vendor's specific code
KVM: x86: Handle the case of 5-level shadow page table
KVM: SVM: Add 5-level page table support for SVM

arch/x86/include/asm/kvm-x86-ops.h | 1 +
arch/x86/include/asm/kvm_host.h | 6 +--
arch/x86/kvm/mmu/mmu.c | 68 +++++++++++++++++-------------
arch/x86/kvm/svm/svm.c | 14 +++---
arch/x86/kvm/vmx/vmx.c | 7 +--
5 files changed, 52 insertions(+), 44 deletions(-)

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2.31.1