From: <ahmeddan@amazon.com>
To: <kvm@vger.kernel.org>, <pbonzini@redhat.com>,
<nikos.nikoleris@arm.com>, <drjones@redhat.com>,
<graf@amazon.com>
Cc: Daniele Ahmed <ahmeddan@amazon.com>
Subject: [kvm-unit-tests PATCH v2 2/3] [kvm-unit-tests PATCH] x86/msr.c refactor out generic test logic
Date: Mon, 27 Sep 2021 15:30:27 +0000 [thread overview]
Message-ID: <20210927153028.27680-2-ahmeddan@amazon.com> (raw)
In-Reply-To: <20210927153028.27680-1-ahmeddan@amazon.com>
From: Daniele Ahmed <ahmeddan@amazon.com>
Move the generic MSR test logic to its own function.
Signed-off-by: Daniele Ahmed <ahmeddan@amazon.com>
---
x86/msr.c | 33 +++++++++++++++++++--------------
1 file changed, 19 insertions(+), 14 deletions(-)
diff --git a/x86/msr.c b/x86/msr.c
index 7a551c4..8931f59 100644
--- a/x86/msr.c
+++ b/x86/msr.c
@@ -77,26 +77,31 @@ static void test_rdmsr_fault(struct msr_info *msr)
"Expected #GP on RDSMR(%s), got vector %d", msr->name, vector);
}
+static void test_msr(struct msr_info *msr, bool is_64bit_host)
+{
+ if (is_64bit_host || !msr->is_64bit_only) {
+ test_msr_rw(msr, msr->value);
+
+ /*
+ * The 64-bit only MSRs that take an address always perform
+ * canonical checks on both Intel and AMD.
+ */
+ if (msr->is_64bit_only &&
+ msr->value == addr_64)
+ test_wrmsr_fault(msr, NONCANONICAL);
+ } else {
+ test_wrmsr_fault(msr, msr->value);
+ test_rdmsr_fault(msr);
+ }
+}
+
int main(int ac, char **av)
{
bool is_64bit_host = this_cpu_has(X86_FEATURE_LM);
int i;
for (i = 0 ; i < ARRAY_SIZE(msr_info); i++) {
- if (is_64bit_host || !msr_info[i].is_64bit_only) {
- test_msr_rw(&msr_info[i], msr_info[i].value);
-
- /*
- * The 64-bit only MSRs that take an address always perform
- * canonical checks on both Intel and AMD.
- */
- if (msr_info[i].is_64bit_only &&
- msr_info[i].value == addr_64)
- test_wrmsr_fault(&msr_info[i], NONCANONICAL);
- } else {
- test_wrmsr_fault(&msr_info[i], msr_info[i].value);
- test_rdmsr_fault(&msr_info[i]);
- }
+ test_msr(&msr_info[i], is_64bit_host);
}
return report_summary();
--
2.32.0
Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879
next prev parent reply other threads:[~2021-09-27 15:33 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-10 14:31 [kvm-unit-tests PATCH] x86/msr.c generalize to any input msr yqwfh
2021-09-23 9:11 ` Alexander Graf
2021-09-23 9:32 ` Paolo Bonzini
2021-09-27 15:30 ` [kvm-unit-tests PATCH v2 1/3] lib/string: Add stroull and strtoll ahmeddan
2021-09-27 15:30 ` ahmeddan [this message]
2021-09-27 15:38 ` [kvm-unit-tests PATCH v2 2/3] [kvm-unit-tests PATCH] x86/msr.c refactor out generic test logic Alexander Graf
2021-09-27 15:30 ` [kvm-unit-tests PATCH v2 3/3] x86/msr.c generalize to any input msr ahmeddan
2021-09-28 15:36 ` Paolo Bonzini
2021-10-01 14:14 ` Ahmed, Daniele
2021-10-15 15:57 ` Paolo Bonzini
2021-10-13 16:44 ` [kvm-unit-tests PATCH v2 1/3] lib/string: Add stroull and strtoll Andrew Jones
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