Re: [kvm-unit-tests PATCH v2 1/5] s390x: Add specification exception test

Thomas Huth
2021-10-05T14:51:11Z

On 05/10/2021 11.09, Janis Schoetterl-Glausch wrote:
> Generate specification exceptions and check that they occur.
> With the iterations argument one can check if specification
> exception interpretation occurs, e.g. by using a high value and
> checking that the debugfs counters are substantially lower.
> The argument is also useful for estimating the performance benefit
> of interpretation.
>
> Signed-off-by: Janis Schoetterl-Glausch <scgl@linux.ibm.com>
> ---
> s390x/Makefile | 1 +
> s390x/spec_ex.c | 182 ++++++++++++++++++++++++++++++++++++++++++++
> s390x/unittests.cfg | 3 +
> 3 files changed, 186 insertions(+)
> create mode 100644 s390x/spec_ex.c
>
> diff --git a/s390x/Makefile b/s390x/Makefile
> index ef8041a..57d7c9e 100644
> --- a/s390x/Makefile
> +++ b/s390x/Makefile
> @@ -24,6 +24,7 @@ tests += $(TEST_DIR)/mvpg.elf
> tests += $(TEST_DIR)/uv-host.elf
> tests += $(TEST_DIR)/edat.elf
> tests += $(TEST_DIR)/mvpg-sie.elf
> +tests += $(TEST_DIR)/spec_ex.elf
>
> tests_binary = $(patsubst %.elf,%.bin,$(tests))
> ifneq ($(HOST_KEY_DOCUMENT),)
> diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c
> new file mode 100644
> index 0000000..dd0ee53
> --- /dev/null
> +++ b/s390x/spec_ex.c
> @@ -0,0 +1,182 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * © Copyright IBM Corp. 2021

Could we please avoid non-ASCII characters in source code if possible? ...
it's maybe best if you do the Copyright line similar to the other *.c files
from IBM that are already in the repository.

> + * Specification exception test.
> + * Tests that specification exceptions occur when expected.
> + */
> +#include <stdlib.h>
> +#include <libcflat.h>
> +#include <asm/interrupt.h>
> +#include <asm/facility.h>
> +
> +static struct lowcore *lc = (struct lowcore *) 0;
> +
> +static bool expect_invalid_psw;
> +static struct psw expected_psw;
> +static struct psw fixup_psw;
> +
> +/* The standard program exception handler cannot deal with invalid old PSWs,
> + * especially not invalid instruction addresses, as in that case one cannot
> + * find the instruction following the faulting one from the old PSW.
> + * The PSW to return to is set by load_psw.
> + */
> +static void fixup_invalid_psw(void)
> +{
> + if (expect_invalid_psw) {
> + report(expected_psw.mask == lc->pgm_old_psw.mask
> + && expected_psw.addr == lc->pgm_old_psw.addr,
> + "Invalid program new PSW as expected");
> + expect_invalid_psw = false;
> + }
> + lc->pgm_old_psw = fixup_psw;
> +}
> +
> +static void load_psw(struct psw psw)
> +{
> + uint64_t r0 = 0, r1 = 0;
> +
> + asm volatile (
> + " epsw %0,%1\n"
> + " st %0,%[mask]\n"
> + " st %1,4+%[mask]\n"
> + " larl %0,nop%=\n"
> + " stg %0,%[addr]\n"
> + " lpswe %[psw]\n"
> + "nop%=: nop\n"
> + : "+&r"(r0), "+&a"(r1), [mask] "=&R"(fixup_psw.mask),
> + [addr] "=&R"(fixup_psw.addr)

stg uses long displacement, so maybe the constraint should rather be "T"
instead?

> + : [psw] "Q"(psw)
> + : "cc", "memory"
> + );
> +}
> +
> +static void psw_bit_12_is_1(void)
> +{
> + expected_psw.mask = 0x0008000000000000;
> + expected_psw.addr = 0x00000000deadbeee;
> + expect_invalid_psw = true;
> + load_psw(expected_psw);
> +}
> +
> +static void bad_alignment(void)
> +{
> + uint32_t words[5] = {0, 0, 0};
> + uint32_t (*bad_aligned)[4];
> +
> + register uint64_t r1 asm("6");
> + register uint64_t r2 asm("7");
> + if (((uintptr_t)&words[0]) & 0xf)
> + bad_aligned = (uint32_t (*)[4])&words[0];
> + else
> + bad_aligned = (uint32_t (*)[4])&words[1];
> + asm volatile ("lpq %0,%2"
> + : "=r"(r1), "=r"(r2)
> + : "T"(*bad_aligned)
> + );
> +}
> +
> +static void not_even(void)
> +{
> + uint64_t quad[2];
> +
> + register uint64_t r1 asm("7");
> + register uint64_t r2 asm("8");
> + asm volatile (".insn rxy,0xe3000000008f,%0,%2" //lpq %0,%2
> + : "=r"(r1), "=r"(r2)
> + : "T"(quad)
> + );
> +}
> +
> +struct spec_ex_trigger {
> + const char *name;
> + void (*func)(void);
> + void (*fixup)(void);
> +};
> +
> +static const struct spec_ex_trigger spec_ex_triggers[] = {
> + { "psw_bit_12_is_1", &psw_bit_12_is_1, &fixup_invalid_psw},
> + { "bad_alignment", &bad_alignment, NULL},
> + { "not_even", &not_even, NULL},
> + { NULL, NULL, NULL},
> +};
> +
> +struct args {
> + uint64_t iterations;
> +};
> +
> +static void test_spec_ex(struct args *args,
> + const struct spec_ex_trigger *trigger)
> +{
> + uint16_t expected_pgm = PGM_INT_CODE_SPECIFICATION;
> + uint16_t pgm;
> + unsigned int i;
> +
> + for (i = 0; i < args->iterations; i++) {
> + expect_pgm_int();
> + register_pgm_cleanup_func(trigger->fixup);
> + trigger->func();
> + register_pgm_cleanup_func(NULL);
> + pgm = clear_pgm_int();
> + if (pgm != expected_pgm) {
> + report(0,
> + "Program interrupt: expected(%d) == received(%d)",
> + expected_pgm,
> + pgm);
> + return;
> + }
> + }
> + report(1,
> + "Program interrupt: always expected(%d) == received(%d)",
> + expected_pgm,
> + expected_pgm);
> +}
> +
> +static struct args parse_args(int argc, char **argv)
> +{
> + struct args args = {
> + .iterations = 1,
> + };
> + unsigned int i;
> + long arg;
> + bool no_arg;
> + char *end;
> +
> + for (i = 1; i < argc; i++) {
> + no_arg = true;
> + if (i < argc - 1) {
> + no_arg = *argv[i+1] == '\0';
> + arg = strtol(argv[i+1], &end, 10);

Nit: It's more common to use spaces around the "+" (i.e. "i + 1")

> + no_arg |= *end != '\0';
> + no_arg |= arg < 0;
> + }
> +
> + if (!strcmp("--iterations", argv[i])) {
> + if (no_arg)
> + report_abort("--iterations needs a positive parameter");
> + args.iterations = arg;
> + ++i;
> + } else {
> + report_abort("Unsupported parameter '%s'",
> + argv[i]);
> + }
> + }
> + return args;
> +}
> +
> +int main(int argc, char **argv)
> +{
> + unsigned int i;
> +
> + struct args args = parse_args(argc, argv);
> +
> + report_prefix_push("specification exception");
> + for (i = 0; spec_ex_triggers[i].name; i++) {
> + report_prefix_push(spec_ex_triggers[i].name);
> + test_spec_ex(&args, &spec_ex_triggers[i]);
> + report_prefix_pop();
> + }
> + report_prefix_pop();
> +
> + return report_summary();
> +}

Apart from the nits, this looks fine to me.

Thomas