From: Reiji Watanabe <reijiw@google.com>
To: Marc Zyngier <maz@kernel.org>, kvmarm@lists.cs.columbia.edu
Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
James Morse <james.morse@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Will Deacon <will@kernel.org>, Andrew Jones <drjones@redhat.com>,
Peng Liang <liangpeng10@huawei.com>,
Peter Shier <pshier@google.com>,
Ricardo Koller <ricarkol@google.com>,
Oliver Upton <oupton@google.com>,
Jing Zhang <jingzhangos@google.com>,
Raghavendra Rao Anata <rananta@google.com>,
Reiji Watanabe <reijiw@google.com>
Subject: [RFC PATCH v3 28/29] KVM: arm64: Add kunit test for trap initialization
Date: Tue, 16 Nov 2021 22:43:58 -0800 [thread overview]
Message-ID: <20211117064359.2362060-29-reijiw@google.com> (raw)
In-Reply-To: <20211117064359.2362060-1-reijiw@google.com>
Add KUnit tests for functions that initialize traps.
Signed-off-by: Reiji Watanabe <reijiw@google.com>
---
arch/arm64/kvm/sys_regs_test.c | 238 +++++++++++++++++++++++++++++++++
1 file changed, 238 insertions(+)
diff --git a/arch/arm64/kvm/sys_regs_test.c b/arch/arm64/kvm/sys_regs_test.c
index 8d27c7c361fb..f73b207be4ee 100644
--- a/arch/arm64/kvm/sys_regs_test.c
+++ b/arch/arm64/kvm/sys_regs_test.c
@@ -844,6 +844,241 @@ static void validate_mvfr1_el1_test(struct kunit *test)
test_kvm_vcpu_fini(test, vcpu);
}
+static void feature_trap_activate_test(struct kunit *test)
+{
+ struct kvm_vcpu *vcpu;
+ struct feature_config_ctrl config_data, *config = &config_data;
+ u64 cfg_mask, cfg_val;
+
+ vcpu = test_kvm_vcpu_init(test);
+ KUNIT_EXPECT_TRUE(test, vcpu);
+ if (!vcpu)
+ return;
+
+ vcpu->arch.hcr_el2 = 0;
+ config->ftr_reg = SYS_ID_AA64MMFR1_EL1;
+ config->ftr_shift = 4;
+ config->ftr_min = 2;
+ config->ftr_signed = FTR_UNSIGNED;
+
+ /* Test for hcr_el2 */
+ config->cfg_reg = VCPU_HCR_EL2;
+ cfg_mask = 0x30000800000;
+ cfg_val = 0x30000800000;
+ config->cfg_mask = cfg_mask;
+ config->cfg_val = cfg_val;
+
+ vcpu->arch.hcr_el2 = 0;
+ feature_trap_activate(vcpu, config);
+ KUNIT_EXPECT_EQ(test, vcpu->arch.hcr_el2 & cfg_mask, cfg_val);
+
+ cfg_mask = 0x30000800000;
+ cfg_val = 0;
+ config->cfg_mask = cfg_mask;
+ config->cfg_val = cfg_val;
+
+ vcpu->arch.hcr_el2 = 0;
+ feature_trap_activate(vcpu, config);
+ KUNIT_EXPECT_EQ(test, vcpu->arch.hcr_el2 & cfg_mask, cfg_val);
+
+ /* Test for mdcr_el2 */
+ config->cfg_reg = VCPU_MDCR_EL2;
+ cfg_mask = 0x30000800000;
+ cfg_val = 0x30000800000;
+ config->cfg_mask = cfg_mask;
+ config->cfg_val = cfg_val;
+
+ vcpu->arch.mdcr_el2 = 0;
+ feature_trap_activate(vcpu, config);
+ KUNIT_EXPECT_EQ(test, vcpu->arch.mdcr_el2 & cfg_mask, cfg_val);
+
+ cfg_mask = 0x30000800000;
+ cfg_val = 0x0;
+ config->cfg_mask = cfg_mask;
+ config->cfg_val = cfg_val;
+
+ vcpu->arch.mdcr_el2 = 0;
+ feature_trap_activate(vcpu, config);
+ KUNIT_EXPECT_EQ(test, vcpu->arch.mdcr_el2 & cfg_mask, cfg_val);
+
+ /* Test for cptr_el2 */
+ config->cfg_reg = VCPU_CPTR_EL2;
+ cfg_mask = 0x30000800000;
+ cfg_val = 0x30000800000;
+ config->cfg_mask = cfg_mask;
+ config->cfg_val = cfg_val;
+
+ vcpu->arch.cptr_el2 = 0;
+ feature_trap_activate(vcpu, config);
+ KUNIT_EXPECT_EQ(test, vcpu->arch.cptr_el2 & cfg_mask, cfg_val);
+
+ cfg_mask = 0x30000800000;
+ cfg_val = 0x0;
+ config->cfg_mask = cfg_mask;
+ config->cfg_val = cfg_val;
+
+ vcpu->arch.cptr_el2 = 0;
+ feature_trap_activate(vcpu, config);
+ KUNIT_EXPECT_EQ(test, vcpu->arch.cptr_el2 & cfg_mask, cfg_val);
+
+ test_kvm_vcpu_fini(test, vcpu);
+}
+
+static bool test_need_trap_aa64dfr0(struct kvm_vcpu *vcpu)
+{
+ u64 val;
+
+ val = __vcpu_sys_reg(vcpu, IDREG_SYS_IDX(SYS_ID_AA64DFR0_EL1));
+ return ((val & 0xf) == 0);
+}
+
+static void id_reg_features_trap_activate_test(struct kunit *test)
+{
+ struct kvm_vcpu *vcpu;
+ u32 id;
+ u64 cfg_mask0, cfg_val0, cfg_mask1, cfg_val1, cfg_mask2, cfg_val2;
+ u64 cfg_mask, cfg_val, id_reg_sys_val;
+ struct id_reg_info id_reg_data;
+ struct feature_config_ctrl *config, config0, config1, config2;
+ struct feature_config_ctrl *trap_features[] = {
+ &config0, &config1, &config2, NULL,
+ };
+
+ vcpu = test_kvm_vcpu_init(test);
+ KUNIT_EXPECT_TRUE(test, vcpu);
+ if (!vcpu)
+ return;
+
+ id_reg_sys_val = 0x7777777777777777;
+ id = SYS_ID_AA64DFR0_EL1;
+ id_reg_data.sys_reg = id;
+ id_reg_data.sys_val = id_reg_sys_val;
+ id_reg_data.vcpu_limit_val = (u64)-1;
+ id_reg_data.trap_features =
+ (const struct feature_config_ctrl *(*)[])trap_features;
+
+ cfg_mask0 = 0x3;
+ cfg_val0 = 0x3;
+ config = &config0;
+ memset(config, 0, sizeof(*config));
+ config->ftr_reg = id;
+ config->ftr_shift = 60;
+ config->ftr_min = 2;
+ config->ftr_signed = FTR_UNSIGNED;
+ config->cfg_reg = VCPU_HCR_EL2;
+ config->cfg_mask = cfg_mask0;
+ config->cfg_val = cfg_val0;
+
+ cfg_mask1 = 0x70000040;
+ cfg_val1 = 0x30000040;
+ config = &config1;
+ memset(config, 0, sizeof(*config));
+ config->ftr_reg = id;
+ config->ftr_need_trap = test_need_trap_aa64dfr0;
+ config->ftr_signed = FTR_UNSIGNED;
+ config->cfg_reg = VCPU_HCR_EL2;
+ config->cfg_mask = cfg_mask1;
+ config->cfg_val = cfg_val1;
+
+ /* Feature with signed ID register field */
+ cfg_mask2 = 0x70000000800;
+ cfg_val2 = 0x30000000800;
+ config = &config2;
+ memset(config, 0, sizeof(*config));
+ config->ftr_reg = id;
+ config->ftr_shift = 4;
+ config->ftr_min = 0;
+ config->ftr_signed = FTR_SIGNED;
+ config->cfg_reg = VCPU_HCR_EL2;
+ config->cfg_mask = cfg_mask2;
+ config->cfg_val = cfg_val2;
+
+ /* Enable features for config0, 1 and 2 */
+ __vcpu_sys_reg(vcpu, IDREG_SYS_IDX(id)) = id_reg_sys_val;
+
+ vcpu->arch.hcr_el2 = 0;
+ id_reg_features_trap_activate(vcpu, &id_reg_data);
+ KUNIT_EXPECT_EQ(test, vcpu->arch.hcr_el2, 0);
+
+ /* Disable features for config0 only */
+ __vcpu_sys_reg(vcpu, IDREG_SYS_IDX(id)) = 0x1;
+ cfg_mask = cfg_mask0;
+ cfg_val = cfg_val0;
+
+ vcpu->arch.hcr_el2 = 0;
+ id_reg_features_trap_activate(vcpu, &id_reg_data);
+ KUNIT_EXPECT_EQ(test, vcpu->arch.hcr_el2 & cfg_mask, cfg_val);
+
+ /* Disable features for config0 and config1 */
+ __vcpu_sys_reg(vcpu, IDREG_SYS_IDX(id)) = 0x0;
+ cfg_mask = (cfg_mask0 | cfg_mask1);
+ cfg_val = (cfg_val0 | cfg_val1);
+
+ vcpu->arch.hcr_el2 = 0;
+ id_reg_features_trap_activate(vcpu, &id_reg_data);
+ KUNIT_EXPECT_EQ(test, vcpu->arch.hcr_el2 & cfg_mask, cfg_val);
+
+ /* Disable features for config0, 1, and 2 */
+ __vcpu_sys_reg(vcpu, IDREG_SYS_IDX(id)) = 0xf0;
+ cfg_mask = (cfg_mask0 | cfg_mask1 | cfg_mask2);
+ cfg_val = (cfg_val0 | cfg_val1 | cfg_val2);
+
+ vcpu->arch.hcr_el2 = 0;
+ id_reg_features_trap_activate(vcpu, &id_reg_data);
+ KUNIT_EXPECT_EQ(test, vcpu->arch.hcr_el2 & cfg_mask, cfg_val);
+
+ /* Test with id_reg_info == NULL */
+ vcpu->arch.hcr_el2 = 0;
+ id_reg_features_trap_activate(vcpu, NULL);
+ KUNIT_EXPECT_EQ(test, vcpu->arch.hcr_el2, 0);
+
+ /* Test with id_reg_data.trap_features = NULL */
+ id_reg_data.trap_features = NULL;
+ __vcpu_sys_reg(vcpu, IDREG_SYS_IDX(id)) = 0xf0;
+
+ vcpu->arch.hcr_el2 = 0;
+ id_reg_features_trap_activate(vcpu, &id_reg_data);
+ KUNIT_EXPECT_EQ(test, vcpu->arch.hcr_el2, 0);
+
+ test_kvm_vcpu_fini(test, vcpu);
+}
+
+static void vcpu_need_trap_ptrauth_test(struct kunit *test)
+{
+ struct kvm_vcpu *vcpu;
+ u32 id = SYS_ID_AA64ISAR1_EL1;
+
+ vcpu = test_kvm_vcpu_init(test);
+ KUNIT_EXPECT_TRUE(test, vcpu);
+ if (!vcpu)
+ return;
+
+ if (system_has_full_ptr_auth()) {
+ __vcpu_sys_reg(vcpu, IDREG_SYS_IDX(id)) = 0x0;
+ KUNIT_EXPECT_TRUE(test, vcpu_need_trap_ptrauth(vcpu));
+
+ /* GPI = 1, API = 1 */
+ __vcpu_sys_reg(vcpu, IDREG_SYS_IDX(id)) = 0x10000100;
+ KUNIT_EXPECT_FALSE(test, vcpu_need_trap_ptrauth(vcpu));
+
+ /* GPI = 1, APA = 1 */
+ __vcpu_sys_reg(vcpu, IDREG_SYS_IDX(id)) = 0x10000010;
+ KUNIT_EXPECT_FALSE(test, vcpu_need_trap_ptrauth(vcpu));
+
+ /* GPA = 1, API = 1 */
+ __vcpu_sys_reg(vcpu, IDREG_SYS_IDX(id)) = 0x01000100;
+ KUNIT_EXPECT_FALSE(test, vcpu_need_trap_ptrauth(vcpu));
+
+ /* GPA = 1, APA = 1 */
+ __vcpu_sys_reg(vcpu, IDREG_SYS_IDX(id)) = 0x01000010;
+ KUNIT_EXPECT_FALSE(test, vcpu_need_trap_ptrauth(vcpu));
+ } else {
+ KUNIT_EXPECT_FALSE(test, vcpu_need_trap_ptrauth(vcpu));
+ }
+
+ test_kvm_vcpu_fini(test, vcpu);
+}
+
static struct kunit_case kvm_sys_regs_test_cases[] = {
KUNIT_CASE_PARAM(arm64_check_feature_one_test, feature_one_gen_params),
KUNIT_CASE_PARAM(arm64_check_features_test, features_gen_params),
@@ -859,6 +1094,9 @@ static struct kunit_case kvm_sys_regs_test_cases[] = {
KUNIT_CASE(validate_id_aa64dfr0_el1_test),
KUNIT_CASE(validate_id_dfr0_el1_test),
KUNIT_CASE(validate_mvfr1_el1_test),
+ KUNIT_CASE(vcpu_need_trap_ptrauth_test),
+ KUNIT_CASE(feature_trap_activate_test),
+ KUNIT_CASE(id_reg_features_trap_activate_test),
{}
};
--
2.34.0.rc1.387.gb447b232ab-goog
next prev parent reply other threads:[~2021-11-17 6:53 UTC|newest]
Thread overview: 109+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-17 6:43 [RFC PATCH v3 00/29] KVM: arm64: Make CPU ID registers writable by userspace Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 01/29] KVM: arm64: Add has_reset_once flag for vcpu Reiji Watanabe
2021-11-21 12:36 ` Marc Zyngier
2021-11-23 0:51 ` Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 02/29] KVM: arm64: Save ID registers' sanitized value per vCPU Reiji Watanabe
2021-11-18 20:36 ` Eric Auger
2021-11-18 22:00 ` Reiji Watanabe
2021-11-24 18:08 ` Eric Auger
2021-11-21 12:36 ` Marc Zyngier
2021-11-23 4:39 ` Reiji Watanabe
2021-11-23 10:03 ` Marc Zyngier
2021-11-23 17:12 ` Reiji Watanabe
2021-12-02 10:58 ` Eric Auger
2021-12-04 1:45 ` Reiji Watanabe
2021-12-07 9:34 ` Eric Auger
2021-12-08 5:57 ` Reiji Watanabe
2021-12-08 7:09 ` Eric Auger
2021-12-08 7:18 ` Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 03/29] KVM: arm64: Introduce struct id_reg_info Reiji Watanabe
2021-11-18 20:36 ` Eric Auger
2021-11-19 4:47 ` Reiji Watanabe
2021-11-21 12:37 ` Marc Zyngier
2021-11-23 0:56 ` Reiji Watanabe
2021-11-24 18:22 ` Eric Auger
2021-11-25 6:05 ` Reiji Watanabe
2021-11-21 12:37 ` Marc Zyngier
2021-11-25 5:27 ` Reiji Watanabe
2021-12-01 15:38 ` Alexandru Elisei
2021-12-02 4:32 ` Reiji Watanabe
2021-11-24 21:07 ` Eric Auger
2021-11-25 6:40 ` Reiji Watanabe
2021-12-02 12:51 ` Eric Auger
2021-12-01 15:24 ` Alexandru Elisei
2021-12-02 4:09 ` Reiji Watanabe
2021-12-02 12:51 ` Eric Auger
2021-12-04 4:35 ` Reiji Watanabe
2021-12-07 9:36 ` Eric Auger
2021-11-17 6:43 ` [RFC PATCH v3 04/29] KVM: arm64: Make ID_AA64PFR0_EL1 writable Reiji Watanabe
2021-11-21 12:37 ` Marc Zyngier
2021-11-24 6:11 ` Reiji Watanabe
2021-11-25 15:35 ` Eric Auger
2021-11-30 1:29 ` Reiji Watanabe
2021-12-02 13:02 ` Eric Auger
2021-12-04 7:59 ` Reiji Watanabe
2021-12-07 9:42 ` Eric Auger
2021-11-17 6:43 ` [RFC PATCH v3 05/29] KVM: arm64: Make ID_AA64PFR1_EL1 writable Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 06/29] KVM: arm64: Make ID_AA64ISAR0_EL1 writable Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 07/29] KVM: arm64: Make ID_AA64ISAR1_EL1 writable Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 08/29] KVM: arm64: Make ID_AA64MMFR0_EL1 writable Reiji Watanabe
2021-11-25 15:31 ` Eric Auger
2021-11-30 4:43 ` Reiji Watanabe
2021-11-25 16:06 ` Eric Auger
2021-11-17 6:43 ` [RFC PATCH v3 09/29] KVM: arm64: Hide IMPLEMENTATION DEFINED PMU support for the guest Reiji Watanabe
2021-11-25 20:30 ` Eric Auger
2021-11-30 5:32 ` Reiji Watanabe
2021-12-01 15:53 ` Alexandru Elisei
2021-12-01 16:09 ` Alexandru Elisei
2021-12-02 4:42 ` Reiji Watanabe
2021-12-02 10:57 ` Eric Auger
2021-12-04 1:04 ` Reiji Watanabe
2021-12-04 14:14 ` Eric Auger
2021-12-04 17:39 ` Reiji Watanabe
2021-12-04 23:38 ` Itaru Kitayama
2021-12-06 0:27 ` Reiji Watanabe
2021-12-06 9:52 ` Alexandru Elisei
2021-12-06 10:25 ` Eric Auger
2021-12-07 7:07 ` Reiji Watanabe
2021-12-07 8:10 ` Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 10/29] KVM: arm64: Make ID_AA64DFR0_EL1 writable Reiji Watanabe
2021-11-25 20:30 ` Eric Auger
2021-11-30 5:21 ` Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 11/29] KVM: arm64: Make ID_DFR0_EL1 writable Reiji Watanabe
2021-11-24 13:46 ` Eric Auger
2021-11-25 5:33 ` Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 12/29] KVM: arm64: Make ID_DFR1_EL1 writable Reiji Watanabe
2021-11-25 20:30 ` Eric Auger
2021-11-30 5:39 ` Reiji Watanabe
2021-12-02 13:11 ` Eric Auger
2021-11-17 6:43 ` [RFC PATCH v3 13/29] KVM: arm64: Make ID_MMFR0_EL1 writable Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 14/29] KVM: arm64: Make MVFR1_EL1 writable Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 15/29] KVM: arm64: Make ID registers without id_reg_info writable Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 16/29] KVM: arm64: Add consistency checking for frac fields of ID registers Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 17/29] KVM: arm64: Introduce KVM_CAP_ARM_ID_REG_CONFIGURABLE capability Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 18/29] KVM: arm64: Add kunit test for ID register validation Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 19/29] KVM: arm64: Use vcpu->arch cptr_el2 to track value of cptr_el2 for VHE Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 20/29] KVM: arm64: Use vcpu->arch.mdcr_el2 to track value of mdcr_el2 Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 21/29] KVM: arm64: Introduce framework to trap disabled features Reiji Watanabe
2021-11-21 18:46 ` Marc Zyngier
2021-11-23 7:27 ` Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 22/29] KVM: arm64: Trap disabled features of ID_AA64PFR0_EL1 Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 23/29] KVM: arm64: Trap disabled features of ID_AA64PFR1_EL1 Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 24/29] KVM: arm64: Trap disabled features of ID_AA64DFR0_EL1 Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 25/29] KVM: arm64: Trap disabled features of ID_AA64MMFR1_EL1 Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 26/29] KVM: arm64: Trap disabled features of ID_AA64ISAR1_EL1 Reiji Watanabe
2021-11-17 6:43 ` [RFC PATCH v3 27/29] KVM: arm64: Initialize trapping of disabled CPU features for the guest Reiji Watanabe
2021-11-17 6:43 ` Reiji Watanabe [this message]
2021-11-17 6:43 ` [RFC PATCH v3 29/29] KVM: arm64: selftests: Introduce id_reg_test Reiji Watanabe
2021-11-18 20:34 ` Eric Auger
2021-11-20 6:39 ` Reiji Watanabe
2021-11-22 14:17 ` Eric Auger
2021-11-23 6:33 ` Reiji Watanabe
2021-11-23 16:00 ` [RFC PATCH v3 00/29] KVM: arm64: Make CPU ID registers writable by userspace Alexandru Elisei
2021-11-24 5:13 ` Reiji Watanabe
2021-11-24 10:50 ` Alexandru Elisei
2021-11-24 17:00 ` Reiji Watanabe
2021-11-23 16:27 ` Alexandru Elisei
2021-11-24 5:49 ` Reiji Watanabe
2021-11-24 10:48 ` Alexandru Elisei
2021-11-24 16:44 ` Reiji Watanabe
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