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From: Jason Gunthorpe <jgg@nvidia.com>
To: "Tian, Kevin" <kevin.tian@intel.com>
Cc: Jean-Philippe Brucker <jean-philippe@linaro.org>,
	Eric Auger <eric.auger@redhat.com>,
	Lu Baolu <baolu.lu@linux.intel.com>,
	Joerg Roedel <joro@8bytes.org>,
	"peter.maydell@linaro.org" <peter.maydell@linaro.org>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"vivek.gautam@arm.com" <vivek.gautam@arm.com>,
	"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
	"eric.auger.pro@gmail.com" <eric.auger.pro@gmail.com>,
	"Raj, Ashok" <ashok.raj@intel.com>,
	"maz@kernel.org" <maz@kernel.org>,
	"vsethi@nvidia.com" <vsethi@nvidia.com>,
	"zhangfei.gao@linaro.org" <zhangfei.gao@linaro.org>,
	"will@kernel.org" <will@kernel.org>,
	"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
	"wangxingang5@huawei.com" <wangxingang5@huawei.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"lushenming@huawei.com" <lushenming@huawei.com>,
	"iommu@lists.linux-foundation.org"
	<iommu@lists.linux-foundation.org>,
	"robin.murphy@arm.com" <robin.murphy@arm.com>
Subject: Re: [RFC v16 1/9] iommu: Introduce attach/detach_pasid_table API
Date: Thu, 9 Dec 2021 12:08:03 -0400	[thread overview]
Message-ID: <20211209160803.GR6385@nvidia.com> (raw)
In-Reply-To: <BN9PR11MB5276D3B4B181F73A1D62361C8C709@BN9PR11MB5276.namprd11.prod.outlook.com>

On Thu, Dec 09, 2021 at 03:59:57AM +0000, Tian, Kevin wrote:
> > From: Tian, Kevin
> > Sent: Thursday, December 9, 2021 10:58 AM
> > 
> > For ARM it's SMMU's PASID table format. There is no step-2 since PASID
> > is already within the address space covered by the user PASID table.
> > 
> 
> One correction here. 'no step-2' is definitely wrong here as it means
> more than user page table in your plan (e.g. dpdk).
> 
> To simplify it what I meant is:
> 
> iommufd reports how many 'user page tables' are supported given a device.
> 
> ARM always reports only one can be supported, and it must be created in 
> PASID table format. tagged by RID.
> 
> Intel reports one in step1 (tagged by RID), and N in step2 (tagged by
> RID+PASID). A special flag in attach call allows the user to specify the
> additional PASID routing info for a 'user page table'.

I don't think 'number of user page tables' makes sense

It really is 'attach to the whole device' vs 'attach to the RID' as a
semantic that should exist 

If we imagine a userspace using kernel page tables it certainly makes
sense to assign page table A to the RID and page table B to a PASID
even in simple cases like vfio-pci.

The only case where userspace would want to capture the entire RID and
all PASIDs is something like this ARM situation - but userspace just
created a device specific object and already knows exactly what kind
of behavior it has.

So, something like vfio pci would implement three uAPI operations:
 - Attach page table to RID
 - Attach page table to PASID
 - Attach page table to RID and all PASIDs
   And here 'page table' is everything below the STE in SMMUv3

While mdev can only support:
 - Access emulated page table
 - Attach page table to PASID

It is what I've said a couple of times, the API the driver calls
toward iommufd to attach a page table must be unambiguous as to the
intention, which also means userspace must be unambiguous too.

Jason

  reply	other threads:[~2021-12-09 16:08 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-27 10:44 [RFC v16 0/9] SMMUv3 Nested Stage Setup (IOMMU part) Eric Auger
2021-10-27 10:44 ` [RFC v16 1/9] iommu: Introduce attach/detach_pasid_table API Eric Auger
2021-12-06 10:48   ` Joerg Roedel
2021-12-07 10:22     ` Eric Auger
2021-12-08  2:44       ` Lu Baolu
2021-12-08  7:33         ` Eric Auger
2021-12-08 12:56           ` Jason Gunthorpe
2021-12-08 17:20             ` Jean-Philippe Brucker
2021-12-08 18:31               ` Jason Gunthorpe
2021-12-09  2:58                 ` Tian, Kevin
     [not found]                 ` <BN9PR11MB527624080CB9302481B74C7A8C709@BN9PR11MB5276.namprd11.prod.outlook.com>
2021-12-09  3:59                   ` Tian, Kevin
2021-12-09 16:08                     ` Jason Gunthorpe [this message]
2021-12-10  8:56                       ` Tian, Kevin
2021-12-10 13:23                         ` Jason Gunthorpe
2021-12-11  3:57                           ` Tian, Kevin
2021-12-16 20:48                             ` Jason Gunthorpe
2022-01-04  2:42                               ` Tian, Kevin
2021-12-11  5:18                           ` Tian, Kevin
2021-12-09  7:50                 ` Eric Auger
2021-12-09 15:40                   ` Jason Gunthorpe
2021-12-09 16:37                     ` Eric Auger
2021-12-09  3:21             ` Tian, Kevin
2021-12-09  9:44               ` Eric Auger
2021-12-09  8:31             ` Eric Auger
2021-10-27 10:44 ` [RFC v16 2/9] iommu: Introduce iommu_get_nesting Eric Auger
2021-10-27 10:44 ` [RFC v16 3/9] iommu/smmuv3: Allow s1 and s2 configs to coexist Eric Auger
2021-10-27 10:44 ` [RFC v16 4/9] iommu/smmuv3: Get prepared for nested stage support Eric Auger
2021-10-27 10:44 ` [RFC v16 5/9] iommu/smmuv3: Implement attach/detach_pasid_table Eric Auger
2021-10-27 10:44 ` [RFC v16 6/9] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs Eric Auger
2021-10-27 10:44 ` [RFC v16 7/9] iommu/smmuv3: Implement cache_invalidate Eric Auger
2021-10-27 10:44 ` [RFC v16 8/9] iommu/smmuv3: report additional recoverable faults Eric Auger
2021-10-27 10:44 ` [RFC v16 9/9] iommu/smmuv3: Disallow nested mode in presence of HW MSI regions Eric Auger
2021-12-03 12:27 ` [RFC v16 0/9] SMMUv3 Nested Stage Setup (IOMMU part) Zhangfei Gao
2021-12-07 10:27   ` Eric Auger
2021-12-07 10:35     ` Zhangfei Gao
2021-12-07 11:06       ` Eric Auger
2021-12-08 13:33         ` Shameerali Kolothum Thodi
2021-12-03 13:13 ` Sumit Gupta
2021-12-07 10:28   ` Eric Auger

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