From: Jason Gunthorpe <jgg@nvidia.com>
To: "Tian, Kevin" <kevin.tian@intel.com>
Cc: "peter.maydell@linaro.org" <peter.maydell@linaro.org>,
"lushenming@huawei.com" <lushenming@huawei.com>,
"robin.murphy@arm.com" <robin.murphy@arm.com>,
"Raj, Ashok" <ashok.raj@intel.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
Jean-Philippe Brucker <jean-philippe@linaro.org>,
"maz@kernel.org" <maz@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"vsethi@nvidia.com" <vsethi@nvidia.com>,
"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
"wangxingang5@huawei.com" <wangxingang5@huawei.com>,
"vivek.gautam@arm.com" <vivek.gautam@arm.com>,
"zhangfei.gao@linaro.org" <zhangfei.gao@linaro.org>,
"eric.auger.pro@gmail.com" <eric.auger.pro@gmail.com>,
"will@kernel.org" <will@kernel.org>,
"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>
Subject: Re: [RFC v16 1/9] iommu: Introduce attach/detach_pasid_table API
Date: Thu, 16 Dec 2021 16:48:31 -0400 [thread overview]
Message-ID: <20211216204831.GD6385@nvidia.com> (raw)
In-Reply-To: <BN9PR11MB527694446B401EF9761529738C729@BN9PR11MB5276.namprd11.prod.outlook.com>
On Sat, Dec 11, 2021 at 03:57:45AM +0000, Tian, Kevin wrote:
> This might be the only open as I still didn't see why we need an
> explicit flag to claim a 'full device' thing. From kernel p.o.v the
> ARM case is no different from Intel that both allows an user
> page table attached to vRID, just with different format and
> addr width (Intel is 64bit, ARM is 84bit where PASID can be
> considered a sub-handle in the 84bit address space and not
> the kernel's business).
I think the difference is intention.
In one case the kernel is saying 'attach a RID and I intend to use
PASID' in which case the kernel user can call the PASID APIs.
The second case is saying 'I will not use PASID'.
They are different things and I think it is a surprising API if the
kernel user attaches a domain, intends to use PASID and then finds out
it can't, eg because an ARM user page table was hooked up.
If you imagine the flag as 'I intend to use PASID' I think it makes a
fair amount of sense from an API design too.
We could probably do without it, at least for VFIO and qemu cases, but
it seems a little bit peculiar to me.
Jason
next prev parent reply other threads:[~2021-12-16 20:48 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-27 10:44 [RFC v16 0/9] SMMUv3 Nested Stage Setup (IOMMU part) Eric Auger
2021-10-27 10:44 ` [RFC v16 1/9] iommu: Introduce attach/detach_pasid_table API Eric Auger
2021-12-06 10:48 ` Joerg Roedel
2021-12-07 10:22 ` Eric Auger
2021-12-08 2:44 ` Lu Baolu
2021-12-08 7:33 ` Eric Auger
2021-12-08 12:56 ` Jason Gunthorpe
2021-12-08 17:20 ` Jean-Philippe Brucker
2021-12-08 18:31 ` Jason Gunthorpe
2021-12-09 2:58 ` Tian, Kevin
[not found] ` <BN9PR11MB527624080CB9302481B74C7A8C709@BN9PR11MB5276.namprd11.prod.outlook.com>
2021-12-09 3:59 ` Tian, Kevin
2021-12-09 16:08 ` Jason Gunthorpe
2021-12-10 8:56 ` Tian, Kevin
2021-12-10 13:23 ` Jason Gunthorpe
2021-12-11 3:57 ` Tian, Kevin
2021-12-16 20:48 ` Jason Gunthorpe [this message]
2022-01-04 2:42 ` Tian, Kevin
2021-12-11 5:18 ` Tian, Kevin
2021-12-09 7:50 ` Eric Auger
2021-12-09 15:40 ` Jason Gunthorpe
2021-12-09 16:37 ` Eric Auger
2021-12-09 3:21 ` Tian, Kevin
2021-12-09 9:44 ` Eric Auger
2021-12-09 8:31 ` Eric Auger
2021-10-27 10:44 ` [RFC v16 2/9] iommu: Introduce iommu_get_nesting Eric Auger
2021-10-27 10:44 ` [RFC v16 3/9] iommu/smmuv3: Allow s1 and s2 configs to coexist Eric Auger
2021-10-27 10:44 ` [RFC v16 4/9] iommu/smmuv3: Get prepared for nested stage support Eric Auger
2021-10-27 10:44 ` [RFC v16 5/9] iommu/smmuv3: Implement attach/detach_pasid_table Eric Auger
2021-10-27 10:44 ` [RFC v16 6/9] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs Eric Auger
2021-10-27 10:44 ` [RFC v16 7/9] iommu/smmuv3: Implement cache_invalidate Eric Auger
2021-10-27 10:44 ` [RFC v16 8/9] iommu/smmuv3: report additional recoverable faults Eric Auger
2021-10-27 10:44 ` [RFC v16 9/9] iommu/smmuv3: Disallow nested mode in presence of HW MSI regions Eric Auger
2021-12-03 12:27 ` [RFC v16 0/9] SMMUv3 Nested Stage Setup (IOMMU part) Zhangfei Gao
2021-12-07 10:27 ` Eric Auger
2021-12-07 10:35 ` Zhangfei Gao
2021-12-07 11:06 ` Eric Auger
2021-12-08 13:33 ` Shameerali Kolothum Thodi
2021-12-03 13:13 ` Sumit Gupta
2021-12-07 10:28 ` Eric Auger
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