From: Sean Christopherson <seanjc@google.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, Sean Christopherson <seanjc@google.com>
Subject: [kvm-unit-tests PATCH 4/8] x86: desc: Replace spaces with tabs
Date: Fri, 21 Jan 2022 23:18:48 +0000 [thread overview]
Message-ID: <20220121231852.1439917-5-seanjc@google.com> (raw)
In-Reply-To: <20220121231852.1439917-1-seanjc@google.com>
Replace spaces with tabs in smp.c, and opportunistically clean up a
handful of minor coding style violations.
No functional change intended.
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
lib/x86/desc.c | 121 +++++++++++++++++++++++++------------------------
lib/x86/desc.h | 68 +++++++++++++--------------
2 files changed, 95 insertions(+), 94 deletions(-)
diff --git a/lib/x86/desc.c b/lib/x86/desc.c
index 16b72562..25c5ac55 100644
--- a/lib/x86/desc.c
+++ b/lib/x86/desc.c
@@ -58,35 +58,35 @@ void do_handle_exception(struct ex_regs *regs);
void set_idt_entry(int vec, void *addr, int dpl)
{
- idt_entry_t *e = &boot_idt[vec];
- memset(e, 0, sizeof *e);
- e->offset0 = (unsigned long)addr;
- e->selector = read_cs();
- e->ist = 0;
- e->type = 14;
- e->dpl = dpl;
- e->p = 1;
- e->offset1 = (unsigned long)addr >> 16;
+ idt_entry_t *e = &boot_idt[vec];
+ memset(e, 0, sizeof *e);
+ e->offset0 = (unsigned long)addr;
+ e->selector = read_cs();
+ e->ist = 0;
+ e->type = 14;
+ e->dpl = dpl;
+ e->p = 1;
+ e->offset1 = (unsigned long)addr >> 16;
#ifdef __x86_64__
- e->offset2 = (unsigned long)addr >> 32;
+ e->offset2 = (unsigned long)addr >> 32;
#endif
}
void set_idt_dpl(int vec, u16 dpl)
{
- idt_entry_t *e = &boot_idt[vec];
- e->dpl = dpl;
+ idt_entry_t *e = &boot_idt[vec];
+ e->dpl = dpl;
}
void set_idt_sel(int vec, u16 sel)
{
- idt_entry_t *e = &boot_idt[vec];
- e->selector = sel;
+ idt_entry_t *e = &boot_idt[vec];
+ e->selector = sel;
}
struct ex_record {
- unsigned long rip;
- unsigned long handler;
+ unsigned long rip;
+ unsigned long handler;
};
extern struct ex_record exception_table_start, exception_table_end;
@@ -154,20 +154,20 @@ void unhandled_exception(struct ex_regs *regs, bool cpu)
static void check_exception_table(struct ex_regs *regs)
{
- struct ex_record *ex;
- unsigned ex_val;
+ struct ex_record *ex;
+ unsigned ex_val;
- ex_val = regs->vector | (regs->error_code << 16) |
+ ex_val = regs->vector | (regs->error_code << 16) |
(((regs->rflags >> 16) & 1) << 8);
- asm("mov %0, %%gs:4" : : "r"(ex_val));
+ asm("mov %0, %%gs:4" : : "r"(ex_val));
- for (ex = &exception_table_start; ex != &exception_table_end; ++ex) {
- if (ex->rip == regs->rip) {
- regs->rip = ex->handler;
- return;
- }
- }
- unhandled_exception(regs, false);
+ for (ex = &exception_table_start; ex != &exception_table_end; ++ex) {
+ if (ex->rip == regs->rip) {
+ regs->rip = ex->handler;
+ return;
+ }
+ }
+ unhandled_exception(regs, false);
}
static handler exception_handlers[32];
@@ -278,51 +278,52 @@ static void *idt_handlers[32] = {
void setup_idt(void)
{
- int i;
- static bool idt_initialized = false;
+ int i;
+ static bool idt_initialized = false;
- if (idt_initialized) {
- return;
- }
- idt_initialized = true;
- for (i = 0; i < 32; i++)
- if (idt_handlers[i])
- set_idt_entry(i, idt_handlers[i], 0);
- handle_exception(0, check_exception_table);
- handle_exception(6, check_exception_table);
- handle_exception(13, check_exception_table);
+ if (idt_initialized)
+ return;
+
+ idt_initialized = true;
+ for (i = 0; i < 32; i++) {
+ if (idt_handlers[i])
+ set_idt_entry(i, idt_handlers[i], 0);
+ }
+ handle_exception(0, check_exception_table);
+ handle_exception(6, check_exception_table);
+ handle_exception(13, check_exception_table);
}
unsigned exception_vector(void)
{
- unsigned char vector;
+ unsigned char vector;
- asm volatile("movb %%gs:4, %0" : "=q"(vector));
- return vector;
+ asm volatile("movb %%gs:4, %0" : "=q"(vector));
+ return vector;
}
int write_cr4_checking(unsigned long val)
{
- asm volatile(ASM_TRY("1f")
- "mov %0,%%cr4\n\t"
- "1:": : "r" (val));
- return exception_vector();
+ asm volatile(ASM_TRY("1f")
+ "mov %0,%%cr4\n\t"
+ "1:": : "r" (val));
+ return exception_vector();
}
unsigned exception_error_code(void)
{
- unsigned short error_code;
+ unsigned short error_code;
- asm volatile("mov %%gs:6, %0" : "=r"(error_code));
- return error_code;
+ asm volatile("mov %%gs:6, %0" : "=r"(error_code));
+ return error_code;
}
bool exception_rflags_rf(void)
{
- unsigned char rf_flag;
+ unsigned char rf_flag;
- asm volatile("movb %%gs:5, %b0" : "=q"(rf_flag));
- return rf_flag & 1;
+ asm volatile("movb %%gs:5, %b0" : "=q"(rf_flag));
+ return rf_flag & 1;
}
static char intr_alt_stack[4096];
@@ -352,20 +353,20 @@ void set_gdt_entry(int sel, unsigned long base, u32 limit, u8 type, u8 flags)
#ifndef __x86_64__
void set_gdt_task_gate(u16 sel, u16 tss_sel)
{
- set_gdt_entry(sel, tss_sel, 0, 0x85, 0); // task, present
+ set_gdt_entry(sel, tss_sel, 0, 0x85, 0); // task, present
}
void set_idt_task_gate(int vec, u16 sel)
{
- idt_entry_t *e = &boot_idt[vec];
+ idt_entry_t *e = &boot_idt[vec];
- memset(e, 0, sizeof *e);
+ memset(e, 0, sizeof *e);
- e->selector = sel;
- e->ist = 0;
- e->type = 5;
- e->dpl = 0;
- e->p = 1;
+ e->selector = sel;
+ e->ist = 0;
+ e->type = 5;
+ e->dpl = 0;
+ e->p = 1;
}
/*
diff --git a/lib/x86/desc.h b/lib/x86/desc.h
index 9b81da0c..2660300b 100644
--- a/lib/x86/desc.h
+++ b/lib/x86/desc.h
@@ -7,20 +7,20 @@ void setup_idt(void);
void setup_alt_stack(void);
struct ex_regs {
- unsigned long rax, rcx, rdx, rbx;
- unsigned long dummy, rbp, rsi, rdi;
+ unsigned long rax, rcx, rdx, rbx;
+ unsigned long dummy, rbp, rsi, rdi;
#ifdef __x86_64__
- unsigned long r8, r9, r10, r11;
- unsigned long r12, r13, r14, r15;
+ unsigned long r8, r9, r10, r11;
+ unsigned long r12, r13, r14, r15;
#endif
- unsigned long vector;
- unsigned long error_code;
- unsigned long rip;
- unsigned long cs;
- unsigned long rflags;
+ unsigned long vector;
+ unsigned long error_code;
+ unsigned long rip;
+ unsigned long cs;
+ unsigned long rflags;
#ifdef __x86_64__
- unsigned long rsp;
- unsigned long ss;
+ unsigned long rsp;
+ unsigned long ss;
#endif
};
@@ -80,19 +80,19 @@ typedef struct __attribute__((packed)) {
} tss64_t;
#ifdef __x86_64
-#define ASM_TRY(catch) \
- "movl $0, %%gs:4 \n\t" \
- ".pushsection .data.ex \n\t" \
- ".quad 1111f, " catch "\n\t" \
- ".popsection \n\t" \
- "1111:"
+#define ASM_TRY(catch) \
+ "movl $0, %%gs:4 \n\t" \
+ ".pushsection .data.ex \n\t" \
+ ".quad 1111f, " catch "\n\t" \
+ ".popsection \n\t" \
+ "1111:"
#else
-#define ASM_TRY(catch) \
- "movl $0, %%gs:4 \n\t" \
- ".pushsection .data.ex \n\t" \
- ".long 1111f, " catch "\n\t" \
- ".popsection \n\t" \
- "1111:"
+#define ASM_TRY(catch) \
+ "movl $0, %%gs:4 \n\t" \
+ ".pushsection .data.ex \n\t" \
+ ".long 1111f, " catch "\n\t" \
+ ".popsection \n\t" \
+ "1111:"
#endif
/*
@@ -152,18 +152,18 @@ typedef struct __attribute__((packed)) {
#define TSS_MAIN 0x80
typedef struct {
- unsigned short offset0;
- unsigned short selector;
- unsigned short ist : 3;
- unsigned short : 5;
- unsigned short type : 4;
- unsigned short : 1;
- unsigned short dpl : 2;
- unsigned short p : 1;
- unsigned short offset1;
+ unsigned short offset0;
+ unsigned short selector;
+ unsigned short ist : 3;
+ unsigned short : 5;
+ unsigned short type : 4;
+ unsigned short : 1;
+ unsigned short dpl : 2;
+ unsigned short p : 1;
+ unsigned short offset1;
#ifdef __x86_64__
- unsigned offset2;
- unsigned reserved;
+ unsigned offset2;
+ unsigned reserved;
#endif
} idt_entry_t;
--
2.35.0.rc0.227.g00780c9af4-goog
next prev parent reply other threads:[~2022-01-21 23:19 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-21 23:18 [kvm-unit-tests PATCH 0/8] x86: APIC bug fix and cleanup Sean Christopherson
2022-01-21 23:18 ` [kvm-unit-tests PATCH 1/8] x86: Always use legacy xAPIC to get APIC ID during TSS setup Sean Christopherson
2022-01-22 1:18 ` David Matlack
2022-01-21 23:18 ` [kvm-unit-tests PATCH 2/8] x86: nVMX: Load actual GS.base for both guest and host Sean Christopherson
2022-01-21 23:18 ` [kvm-unit-tests PATCH 3/8] x86: smp: Replace spaces with tabs Sean Christopherson
2022-01-21 23:18 ` Sean Christopherson [this message]
2022-01-21 23:18 ` [kvm-unit-tests PATCH 5/8] x86: Add proper helpers for per-cpu reads/writes Sean Christopherson
2022-01-21 23:18 ` [kvm-unit-tests PATCH 6/8] x86: apic: Replace spaces with tabs Sean Christopherson
2022-01-21 23:18 ` [kvm-unit-tests PATCH 7/8] x86: apic: Track APIC ops on a per-cpu basis Sean Christopherson
2022-01-21 23:18 ` [kvm-unit-tests PATCH 8/8] x86: apic: Make xAPIC and I/O APIC pointers static Sean Christopherson
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