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[31.30.173.70]) by smtp.gmail.com with ESMTPSA id gu2sm8295149ejb.221.2022.01.26.23.49.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Jan 2022 23:49:24 -0800 (PST) Date: Thu, 27 Jan 2022 08:49:22 +0100 From: Andrew Jones To: Ricardo Koller Cc: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, maz@kernel.org, Paolo Bonzini , oupton@google.com, reijiw@google.com Subject: Re: [PATCH v2 4/5] kvm: selftests: aarch64: fix some vgic related comments Message-ID: <20220127074922.6m53vckomn7lacog@gator> References: <20220127030858.3269036-1-ricarkol@google.com> <20220127030858.3269036-5-ricarkol@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220127030858.3269036-5-ricarkol@google.com> Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Wed, Jan 26, 2022 at 07:08:57PM -0800, Ricardo Koller wrote: > Fix the formatting of some comments and the wording of one of them (in > gicv3_access_reg). > > Signed-off-by: Ricardo Koller > Reported-by: Reiji Watanabe > Cc: Andrew Jones > Reviewed-by: Andrew Jones I didn't give my r-b to this patch before, but you can keep it, because here's another one Reviewed-by: Andrew Jones > --- > tools/testing/selftests/kvm/aarch64/vgic_irq.c | 12 ++++++++---- > tools/testing/selftests/kvm/lib/aarch64/gic_v3.c | 10 ++++++---- > tools/testing/selftests/kvm/lib/aarch64/vgic.c | 3 ++- > 3 files changed, 16 insertions(+), 9 deletions(-) > > diff --git a/tools/testing/selftests/kvm/aarch64/vgic_irq.c b/tools/testing/selftests/kvm/aarch64/vgic_irq.c > index 0106fc464afe..f0230711fbe9 100644 > --- a/tools/testing/selftests/kvm/aarch64/vgic_irq.c > +++ b/tools/testing/selftests/kvm/aarch64/vgic_irq.c > @@ -306,7 +306,8 @@ static void guest_restore_active(struct test_args *args, > uint32_t prio, intid, ap1r; > int i; > > - /* Set the priorities of the first (KVM_NUM_PRIOS - 1) IRQs > + /* > + * Set the priorities of the first (KVM_NUM_PRIOS - 1) IRQs > * in descending order, so intid+1 can preempt intid. > */ > for (i = 0, prio = (num - 1) * 8; i < num; i++, prio -= 8) { > @@ -315,7 +316,8 @@ static void guest_restore_active(struct test_args *args, > gic_set_priority(intid, prio); > } > > - /* In a real migration, KVM would restore all GIC state before running > + /* > + * In a real migration, KVM would restore all GIC state before running > * guest code. > */ > for (i = 0; i < num; i++) { > @@ -503,7 +505,8 @@ static void guest_code(struct test_args *args) > test_injection_failure(args, f); > } > > - /* Restore the active state of IRQs. This would happen when live > + /* > + * Restore the active state of IRQs. This would happen when live > * migrating IRQs in the middle of being handled. > */ > for_each_supported_activate_fn(args, set_active_fns, f) > @@ -840,7 +843,8 @@ int main(int argc, char **argv) > } > } > > - /* If the user just specified nr_irqs and/or gic_version, then run all > + /* > + * If the user just specified nr_irqs and/or gic_version, then run all > * combinations. > */ > if (default_args) { > diff --git a/tools/testing/selftests/kvm/lib/aarch64/gic_v3.c b/tools/testing/selftests/kvm/lib/aarch64/gic_v3.c > index e4945fe66620..263bf3ed8fd5 100644 > --- a/tools/testing/selftests/kvm/lib/aarch64/gic_v3.c > +++ b/tools/testing/selftests/kvm/lib/aarch64/gic_v3.c > @@ -19,7 +19,7 @@ struct gicv3_data { > unsigned int nr_spis; > }; > > -#define sgi_base_from_redist(redist_base) (redist_base + SZ_64K) > +#define sgi_base_from_redist(redist_base) (redist_base + SZ_64K) > #define DIST_BIT (1U << 31) > > enum gicv3_intid_range { > @@ -105,7 +105,8 @@ static void gicv3_set_eoi_split(bool split) > { > uint32_t val; > > - /* All other fields are read-only, so no need to read CTLR first. In > + /* > + * All other fields are read-only, so no need to read CTLR first. In > * fact, the kernel does the same. > */ > val = split ? (1U << 1) : 0; > @@ -160,8 +161,9 @@ static void gicv3_access_reg(uint32_t intid, uint64_t offset, > > GUEST_ASSERT(bits_per_field <= reg_bits); > GUEST_ASSERT(!write || *val < (1U << bits_per_field)); > - /* Some registers like IROUTER are 64 bit long. Those are currently not > - * supported by readl nor writel, so just asserting here until then. > + /* > + * This function does not support 64 bit accesses. Just asserting here > + * until we implement readq/writeq. > */ > GUEST_ASSERT(reg_bits == 32); > > diff --git a/tools/testing/selftests/kvm/lib/aarch64/vgic.c b/tools/testing/selftests/kvm/lib/aarch64/vgic.c > index b3a0fca0d780..79864b941617 100644 > --- a/tools/testing/selftests/kvm/lib/aarch64/vgic.c > +++ b/tools/testing/selftests/kvm/lib/aarch64/vgic.c > @@ -150,7 +150,8 @@ static void vgic_poke_irq(int gic_fd, uint32_t intid, > attr += SZ_64K; > } > > - /* All calls will succeed, even with invalid intid's, as long as the > + /* > + * All calls will succeed, even with invalid intid's, as long as the > * addr part of the attr is within 32 bits (checked above). An invalid > * intid will just make the read/writes point to above the intended > * register space (i.e., ICPENDR after ISPENDR). > -- > 2.35.0.rc0.227.g00780c9af4-goog >