From: Oliver Upton <oupton@google.com>
To: kvm@vger.kernel.org
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
Oliver Upton <oupton@google.com>
Subject: [PATCH v2 3/7] KVM: nVMX: Roll all entry/exit ctl updates into a single helper
Date: Fri, 4 Feb 2022 20:47:01 +0000 [thread overview]
Message-ID: <20220204204705.3538240-4-oupton@google.com> (raw)
In-Reply-To: <20220204204705.3538240-1-oupton@google.com>
nested_vmx_pmu_entry_exit_ctls_update() is no longer useful; updating
the entry/exit ctrl bits in the vendor vcpu_after_set_cpuid() hook is
sufficient as KVM has already recalculated the vPMU version.
Keep all of KVM's bad behavior with regards to the VMX entry/exit
control MSRs in one place. Remove all traces of the PMU helper and
inline the bit twiddling to nested_vmx_entry_exit_ctls_update().
Signed-off-by: Oliver Upton <oupton@google.com>
---
arch/x86/kvm/vmx/nested.c | 21 ---------------------
arch/x86/kvm/vmx/nested.h | 1 -
arch/x86/kvm/vmx/pmu_intel.c | 2 --
arch/x86/kvm/vmx/vmx.c | 8 +++++++-
4 files changed, 7 insertions(+), 25 deletions(-)
diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
index 59164394569f..2e8facff93f8 100644
--- a/arch/x86/kvm/vmx/nested.c
+++ b/arch/x86/kvm/vmx/nested.c
@@ -4806,27 +4806,6 @@ int get_vmx_mem_address(struct kvm_vcpu *vcpu, unsigned long exit_qualification,
return 0;
}
-void nested_vmx_pmu_entry_exit_ctls_update(struct kvm_vcpu *vcpu)
-{
- struct vcpu_vmx *vmx;
-
- if (!nested_vmx_allowed(vcpu))
- return;
-
- vmx = to_vmx(vcpu);
- if (kvm_x86_ops.pmu_ops->is_valid_msr(vcpu, MSR_CORE_PERF_GLOBAL_CTRL)) {
- vmx->nested.msrs.entry_ctls_high |=
- VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL;
- vmx->nested.msrs.exit_ctls_high |=
- VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL;
- } else {
- vmx->nested.msrs.entry_ctls_high &=
- ~VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL;
- vmx->nested.msrs.exit_ctls_high &=
- ~VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL;
- }
-}
-
static int nested_vmx_get_vmptr(struct kvm_vcpu *vcpu, gpa_t *vmpointer,
int *ret)
{
diff --git a/arch/x86/kvm/vmx/nested.h b/arch/x86/kvm/vmx/nested.h
index b69a80f43b37..14ad756aac46 100644
--- a/arch/x86/kvm/vmx/nested.h
+++ b/arch/x86/kvm/vmx/nested.h
@@ -32,7 +32,6 @@ int vmx_set_vmx_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
int vmx_get_vmx_msr(struct nested_vmx_msrs *msrs, u32 msr_index, u64 *pdata);
int get_vmx_mem_address(struct kvm_vcpu *vcpu, unsigned long exit_qualification,
u32 vmx_instruction_info, bool wr, int len, gva_t *ret);
-void nested_vmx_pmu_entry_exit_ctls_update(struct kvm_vcpu *vcpu);
void nested_mark_vmcs12_pages_dirty(struct kvm_vcpu *vcpu);
bool nested_vmx_check_io_bitmaps(struct kvm_vcpu *vcpu, unsigned int port,
int size);
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index 466d18fc0c5d..ad1adbaa7d9e 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -541,8 +541,6 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
bitmap_set(pmu->all_valid_pmc_idx,
INTEL_PMC_MAX_GENERIC, pmu->nr_arch_fixed_counters);
- nested_vmx_pmu_entry_exit_ctls_update(vcpu);
-
if (intel_pmu_lbr_is_compatible(vcpu))
x86_perf_get_lbr(&lbr_desc->records);
else
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 54ac382a0b73..395787b7e7ac 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -7243,7 +7243,13 @@ void nested_vmx_entry_exit_ctls_update(struct kvm_vcpu *vcpu)
}
}
- nested_vmx_pmu_entry_exit_ctls_update(vcpu);
+ if (kvm_pmu_is_valid_msr(vcpu, MSR_CORE_PERF_GLOBAL_CTRL)) {
+ vmx->nested.msrs.entry_ctls_high |= VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL;
+ vmx->nested.msrs.exit_ctls_high |= VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL;
+ } else {
+ vmx->nested.msrs.entry_ctls_high &= ~VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL;
+ vmx->nested.msrs.exit_ctls_high &= ~VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL;
+ }
}
static void update_intel_pt_cfg(struct kvm_vcpu *vcpu)
--
2.35.0.263.gb82422642f-goog
next prev parent reply other threads:[~2022-02-04 20:47 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-04 20:46 [PATCH v2 0/7] VMX: nVMX: VMX control MSR fixes Oliver Upton
2022-02-04 20:46 ` [PATCH v2 1/7] KVM: nVMX: Keep KVM updates to BNDCFGS ctrl bits across MSR write Oliver Upton
2022-02-07 17:21 ` Paolo Bonzini
2022-02-07 18:13 ` Sean Christopherson
2022-02-07 18:22 ` Oliver Upton
2022-02-07 18:27 ` Paolo Bonzini
2022-02-07 18:34 ` Sean Christopherson
2022-02-07 18:52 ` Oliver Upton
2022-02-04 20:47 ` [PATCH v2 2/7] KVM: nVMX: Keep KVM updates to PERF_GLOBAL_CTRL " Oliver Upton
2022-02-07 16:33 ` Paolo Bonzini
2022-02-04 20:47 ` Oliver Upton [this message]
2022-02-05 7:43 ` [PATCH v2 3/7] KVM: nVMX: Roll all entry/exit ctl updates into a single helper kernel test robot
2022-02-05 19:41 ` Oliver Upton
2022-02-07 17:56 ` Sean Christopherson
2022-02-04 20:47 ` [PATCH v2 4/7] KVM: nVMX: Add a quirk for KVM tweaks to VMX control MSRs Oliver Upton
2022-02-07 18:06 ` Sean Christopherson
2022-02-09 1:50 ` Oliver Upton
2022-02-09 20:23 ` Sean Christopherson
2022-02-04 20:47 ` [PATCH v2 5/7] selftests: KVM: Add test for PERF_GLOBAL_CTRL VMX control MSR bits Oliver Upton
2022-02-04 20:47 ` [PATCH v2 6/7] selftests: KVM: Add test for BNDCFGS " Oliver Upton
2022-02-07 16:42 ` Paolo Bonzini
2022-02-04 20:47 ` [PATCH v2 7/7] KVM: VMX: Use local pointer to vcpu_vmx in vmx_vcpu_after_set_cpuid() Oliver Upton
2022-02-07 16:42 ` Paolo Bonzini
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