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From: Reiji Watanabe <reijiw@google.com>
To: Marc Zyngier <maz@kernel.org>, kvmarm@lists.cs.columbia.edu
Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	James Morse <james.morse@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Will Deacon <will@kernel.org>, Andrew Jones <drjones@redhat.com>,
	Fuad Tabba <tabba@google.com>,
	Peng Liang <liangpeng10@huawei.com>,
	Peter Shier <pshier@google.com>,
	Ricardo Koller <ricarkol@google.com>,
	Oliver Upton <oupton@google.com>,
	Jing Zhang <jingzhangos@google.com>,
	Raghavendra Rao Anata <rananta@google.com>,
	Reiji Watanabe <reijiw@google.com>
Subject: [PATCH v5 09/27] KVM: arm64: Make ID_AA64MMFR1_EL1 writable
Date: Sun, 13 Feb 2022 22:57:28 -0800	[thread overview]
Message-ID: <20220214065746.1230608-10-reijiw@google.com> (raw)
In-Reply-To: <20220214065746.1230608-1-reijiw@google.com>

This patch adds id_reg_info for ID_AA64MMFR1_EL1 to make it
writable by userspace.

Hardware update of Access flag and/or Dirty state in translation
table needs to be disabled for the guest to let userspace set
ID_AA64MMFR1_EL1.HAFDBS field to a lower value. It requires trapping
the guest's accessing TCR_EL1, which KVM doesn't always do (in order
to trap it without FEAT_FGT, HCR_EL2.TVM needs to be set to 1, which
also traps many other virtual memory control registers).
So, userspace won't be allowed to modify the value of the HAFDBS field.

Signed-off-by: Reiji Watanabe <reijiw@google.com>
---
 arch/arm64/kvm/sys_regs.c | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 4ed15ae7f160..1c137f8c236f 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -570,6 +570,30 @@ static int validate_id_aa64mmfr0_el1(struct kvm_vcpu *vcpu,
 	return 0;
 }
 
+static int validate_id_aa64mmfr1_el1(struct kvm_vcpu *vcpu,
+				     const struct id_reg_info *id_reg, u64 val)
+{
+	u64 limit = id_reg->vcpu_limit_val;
+	unsigned int hafdbs, lim_hafdbs;
+
+	hafdbs = cpuid_feature_extract_unsigned_field(val, ID_AA64MMFR1_HADBS_SHIFT);
+	lim_hafdbs = cpuid_feature_extract_unsigned_field(limit, ID_AA64MMFR1_HADBS_SHIFT);
+
+	/*
+	 * Don't allow userspace to modify the value of HAFDBS.
+	 * Hardware update of Access flag and/or Dirty state in translation
+	 * table needs to be disabled for the guest to let userspace set
+	 * HAFDBS field to a lower value. It requires trapping the guest's
+	 * accessing TCR_EL1, which KVM doesn't always do (in order to trap
+	 * it without FEAT_FGT, HCR_EL2.TVM needs to be set to 1, which also
+	 * traps many other virtual memory control registers).
+	 */
+	if (hafdbs != lim_hafdbs)
+		return -EINVAL;
+
+	return 0;
+}
+
 static void init_id_aa64pfr0_el1_info(struct id_reg_info *id_reg)
 {
 	u64 limit = id_reg->vcpu_limit_val;
@@ -675,6 +699,11 @@ static struct id_reg_info id_aa64mmfr0_el1_info = {
 	.validate = validate_id_aa64mmfr0_el1,
 };
 
+static struct id_reg_info id_aa64mmfr1_el1_info = {
+	.sys_reg = SYS_ID_AA64MMFR1_EL1,
+	.validate = validate_id_aa64mmfr1_el1,
+};
+
 /*
  * An ID register that needs special handling to control the value for the
  * guest must have its own id_reg_info in id_reg_info_table.
@@ -689,6 +718,7 @@ static struct id_reg_info *id_reg_info_table[KVM_ARM_ID_REG_MAX_NUM] = {
 	[IDREG_IDX(SYS_ID_AA64ISAR0_EL1)] = &id_aa64isar0_el1_info,
 	[IDREG_IDX(SYS_ID_AA64ISAR1_EL1)] = &id_aa64isar1_el1_info,
 	[IDREG_IDX(SYS_ID_AA64MMFR0_EL1)] = &id_aa64mmfr0_el1_info,
+	[IDREG_IDX(SYS_ID_AA64MMFR1_EL1)] = &id_aa64mmfr1_el1_info,
 };
 
 static int validate_id_reg(struct kvm_vcpu *vcpu, u32 id, u64 val)
-- 
2.35.1.265.g69c8d7142f-goog


  parent reply	other threads:[~2022-02-14  6:59 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-14  6:57 [PATCH v5 00/27] KVM: arm64: Make CPU ID registers writable by userspace Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 01/27] KVM: arm64: Introduce a validation function for an ID register Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 02/27] KVM: arm64: Save ID registers' sanitized value per guest Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 03/27] KVM: arm64: Introduce struct id_reg_info Reiji Watanabe
2022-02-17  5:14   ` Oliver Upton
2022-02-22  6:12     ` Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 04/27] KVM: arm64: Make ID_AA64PFR0_EL1 writable Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 05/27] KVM: arm64: Make ID_AA64PFR1_EL1 writable Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 06/27] KVM: arm64: Make ID_AA64ISAR0_EL1 writable Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 07/27] KVM: arm64: Make ID_AA64ISAR1_EL1 writable Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 08/27] KVM: arm64: Make ID_AA64MMFR0_EL1 writable Reiji Watanabe
2022-02-14  6:57 ` Reiji Watanabe [this message]
2022-02-15 18:53   ` [PATCH v5 09/27] KVM: arm64: Make ID_AA64MMFR1_EL1 writable Oliver Upton
2022-02-15 20:24     ` Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 10/27] KVM: arm64: Hide IMPLEMENTATION DEFINED PMU support for the guest Reiji Watanabe
2022-02-15 18:57   ` Oliver Upton
2022-02-16  2:52     ` Reiji Watanabe
2022-02-17  4:59       ` Oliver Upton
2022-02-14  6:57 ` [PATCH v5 11/27] KVM: arm64: Make ID_AA64DFR0_EL1 writable Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 12/27] KVM: arm64: Make ID_DFR0_EL1 writable Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 13/27] KVM: arm64: Make MVFR1_EL1 writable Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 14/27] KVM: arm64: Make ID registers without id_reg_info writable Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 15/27] KVM: arm64: Add consistency checking for frac fields of ID registers Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 16/27] KVM: arm64: Introduce KVM_CAP_ARM_ID_REG_CONFIGURABLE capability Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 17/27] KVM: arm64: Add kunit test for ID register validation Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 18/27] KVM: arm64: Use vcpu->arch cptr_el2 to track value of cptr_el2 for VHE Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 19/27] KVM: arm64: Use vcpu->arch.mdcr_el2 to track value of mdcr_el2 Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 20/27] KVM: arm64: Introduce framework to trap disabled features Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 21/27] KVM: arm64: Trap disabled features of ID_AA64PFR0_EL1 Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 22/27] KVM: arm64: Trap disabled features of ID_AA64PFR1_EL1 Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 23/27] KVM: arm64: Trap disabled features of ID_AA64DFR0_EL1 Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 24/27] KVM: arm64: Trap disabled features of ID_AA64MMFR1_EL1 Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 25/27] KVM: arm64: Trap disabled features of ID_AA64ISAR1_EL1 Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 26/27] KVM: arm64: Add kunit test for trap initialization Reiji Watanabe
2022-02-14  6:57 ` [PATCH v5 27/27] KVM: arm64: selftests: Introduce id_reg_test Reiji Watanabe

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