From: Yang Weijiang <weijiang.yang@intel.com>
To: pbonzini@redhat.com, jmattson@google.com, seanjc@google.com,
kan.liang@linux.intel.com, like.xu.linux@gmail.com,
vkuznets@redhat.com, wei.w.wang@intel.com, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Yang Weijiang <weijiang.yang@intel.com>,
Zhang Yi Z <yi.z.zhang@linux.intel.com>
Subject: [PATCH v11 04/16] KVM: x86: Refresh CPUID on writes to MSR_IA32_XSS
Date: Thu, 5 May 2022 23:32:53 -0400 [thread overview]
Message-ID: <20220506033305.5135-5-weijiang.yang@intel.com> (raw)
In-Reply-To: <20220506033305.5135-1-weijiang.yang@intel.com>
Updated CPUID.0xD.0x1, which reports the current required storage size
of all features enabled via XCR0 | XSS, when the guest's XSS is modified.
Note, KVM does not yet support any XSS based features, i.e. supported_xss
is guaranteed to be zero at this time.
Co-developed-by: Zhang Yi Z <yi.z.zhang@linux.intel.com>
Signed-off-by: Zhang Yi Z <yi.z.zhang@linux.intel.com>
Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
---
arch/x86/kvm/cpuid.c | 16 +++++++++++++---
arch/x86/kvm/x86.c | 6 ++++--
2 files changed, 17 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 598334ed5fbc..63870f78ed16 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -239,9 +239,19 @@ static void __kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu, struct kvm_cpuid_e
best->ebx = xstate_required_size(vcpu->arch.xcr0, false);
best = cpuid_entry2_find(entries, nent, 0xD, 1);
- if (best && (cpuid_entry_has(best, X86_FEATURE_XSAVES) ||
- cpuid_entry_has(best, X86_FEATURE_XSAVEC)))
- best->ebx = xstate_required_size(vcpu->arch.xcr0, true);
+ if (best) {
+ if (cpuid_entry_has(best, X86_FEATURE_XSAVES) ||
+ cpuid_entry_has(best, X86_FEATURE_XSAVEC)) {
+ u64 xstate = vcpu->arch.xcr0 | vcpu->arch.ia32_xss;
+
+ best->ebx = xstate_required_size(xstate, true);
+ }
+
+ if (!cpuid_entry_has(best, X86_FEATURE_XSAVES)) {
+ best->ecx = 0;
+ best->edx = 0;
+ }
+ }
best = __kvm_find_kvm_cpuid_features(vcpu, entries, nent);
if (kvm_hlt_in_guest(vcpu->kvm) && best &&
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 396b576f8c42..f78fc014aed3 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -3576,8 +3576,10 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
*/
if (data & ~supported_xss)
return 1;
- vcpu->arch.ia32_xss = data;
- kvm_update_cpuid_runtime(vcpu);
+ if (vcpu->arch.ia32_xss != data) {
+ vcpu->arch.ia32_xss = data;
+ kvm_update_cpuid_runtime(vcpu);
+ }
break;
case MSR_SMI_COUNT:
if (!msr_info->host_initiated)
--
2.27.0
next prev parent reply other threads:[~2022-05-06 3:33 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-06 3:32 [PATCH v11 00/16] Introduce Architectural LBR for vPMU Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 01/16] perf/x86/intel: Fix the comment about guest LBR support on KVM Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 02/16] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 03/16] KVM: x86: Report XSS as an MSR to be saved if there are supported features Yang Weijiang
2022-05-06 3:32 ` Yang Weijiang [this message]
2022-05-06 3:32 ` [PATCH v11 05/16] KVM: x86: Add Arch LBR MSRs to msrs_to_save_all list Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 06/16] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_DEPTH for guest Arch LBR Yang Weijiang
2022-05-06 14:39 ` Liang, Kan
2022-05-06 3:32 ` [PATCH v11 07/16] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_CTL " Yang Weijiang
2022-05-06 14:42 ` Liang, Kan
2022-05-06 3:32 ` [PATCH v11 08/16] KVM: x86/pmu: Refactor code to support " Yang Weijiang
2022-05-06 15:03 ` Liang, Kan
2022-05-07 2:32 ` Yang, Weijiang
2022-05-09 14:06 ` Liang, Kan
2022-05-06 3:32 ` [PATCH v11 09/16] KVM: x86: Refine the matching and clearing logic for supported_xss Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 10/16] KVM: x86: Add XSAVE Support for Architectural LBR Yang Weijiang
2022-05-06 3:33 ` [PATCH v11 11/16] KVM: x86/vmx: Check Arch LBR config when return perf capabilities Yang Weijiang
2022-05-06 3:33 ` [PATCH v11 12/16] KVM: nVMX: Add necessary Arch LBR settings for nested VM Yang Weijiang
2022-05-06 3:33 ` [PATCH v11 13/16] KVM: x86/vmx: Clear Arch LBREn bit before inject #DB to guest Yang Weijiang
2022-05-06 15:08 ` Liang, Kan
2022-05-06 3:33 ` [PATCH v11 14/16] KVM: x86/vmx: Flip Arch LBREn bit on guest state change Yang Weijiang
2022-05-06 15:08 ` Liang, Kan
2022-05-10 15:51 ` Paolo Bonzini
2022-05-11 7:43 ` Yang, Weijiang
2022-05-12 13:18 ` Paolo Bonzini
2022-05-12 14:38 ` Yang, Weijiang
2022-05-13 4:02 ` Yang, Weijiang
2022-05-17 8:56 ` Yang, Weijiang
2022-05-17 9:01 ` Paolo Bonzini
2022-05-17 11:31 ` Yang, Weijiang
2022-05-12 6:44 ` Yang, Weijiang
2022-05-06 3:33 ` [PATCH v11 15/16] KVM: x86: Add Arch LBR data MSR access interface Yang Weijiang
2022-05-06 15:11 ` Liang, Kan
2022-05-06 3:33 ` [PATCH v11 16/16] KVM: x86/cpuid: Advertise Arch LBR feature in CPUID Yang Weijiang
2022-05-06 15:13 ` Liang, Kan
2022-05-10 15:55 ` [PATCH v11 00/16] Introduce Architectural LBR for vPMU Paolo Bonzini
2022-05-11 0:29 ` Yang, Weijiang
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