[kvm-unit-tests PATCH v2 2/3] x86: Skip running test when pmu is disabled

[Yang Weijiang <weijiang.yang@intel.com>]

Read MSR_IA32_PERF_CAPABILITIES triggers #GP when pmu is disabled
by enable_pmu=0 in KVM. Let's check whether pmu is available before
issue msr reading to avoid the #GP. Also check PDCM bit before read
the MSR.

Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
---
 x86/pmu_lbr.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/x86/pmu_lbr.c b/x86/pmu_lbr.c
index 688634d..62614a0 100644
--- a/x86/pmu_lbr.c
+++ b/x86/pmu_lbr.c
@@ -5,6 +5,7 @@
 #define N 1000000
 #define MAX_NUM_LBR_ENTRY	  32
 #define DEBUGCTLMSR_LBR	  (1UL <<  0)
+#define PDCM_ENABLED	  (1UL << 15)
 #define PMU_CAP_LBR_FMT	  0x3f
 
 #define MSR_LBR_NHM_FROM	0x00000680
@@ -74,13 +75,22 @@ int main(int ac, char **av)
 		return 0;
 	}
 
-	perf_cap = rdmsr(MSR_IA32_PERF_CAPABILITIES);
 	eax.full = id.a;
 
 	if (!eax.split.version_id) {
 		printf("No pmu is detected!\n");
 		return report_summary();
 	}
+
+	id = cpuid(1);
+
+	if (!(id.c & PDCM_ENABLED)) {
+		printf("No PDCM is detected!\n");
+		return report_summary();
+	}
+
+	perf_cap = rdmsr(MSR_IA32_PERF_CAPABILITIES);
+
 	if (!(perf_cap & PMU_CAP_LBR_FMT)) {
 		printf("No LBR is detected!\n");
 		return report_summary();
-- 
2.31.1