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[180.214.232.88]) by smtp.gmail.com with ESMTPSA id 15-20020a63134f000000b00412b1043f33sm253283pgt.39.2022.07.08.21.21.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 21:21:15 -0700 (PDT) Received: by debian.me (Postfix, from userid 1000) id 272401039B9; Sat, 9 Jul 2022 11:21:10 +0700 (WIB) From: Bagas Sanjaya To: linux-doc@vger.kernel.org Cc: Paolo Bonzini , Jonathan Corbet , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Isaku Yamahata , Kai Huang , x86@kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Bagas Sanjaya Subject: [PATCH 02/12] Documentation: kvm: tdx: Use appropriate subbullet marker Date: Sat, 9 Jul 2022 11:20:28 +0700 Message-Id: <20220709042037.21903-3-bagasdotme@gmail.com> X-Mailer: git-send-email 2.37.0 In-Reply-To: <20220709042037.21903-1-bagasdotme@gmail.com> References: <20220709042037.21903-1-bagasdotme@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Sphinx only supports dash (-) and asterisk (*) as bullet marker. Use them instead of dot (.) and equal (=). Fixes: 9e54fa1ac03df3 ("Documentation/virtual/kvm: Document on Trust Domain Extensions(TDX)") Signed-off-by: Bagas Sanjaya --- Documentation/virt/kvm/intel-tdx.rst | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/Documentation/virt/kvm/intel-tdx.rst b/Documentation/virt/kvm/intel-tdx.rst index 46ad32f3248e40..7a7c17da3a045f 100644 --- a/Documentation/virt/kvm/intel-tdx.rst +++ b/Documentation/virt/kvm/intel-tdx.rst @@ -216,15 +216,16 @@ The main issue for it is that the logic of kvm_x86_ops callbacks for TDX is different from VMX. On the other hand, the variable, kvm_x86_ops, is global single variable. Not per-VM, not per-vcpu. -Several points to be considered. - . No or minimal overhead when TDX is disabled(CONFIG_INTEL_TDX_HOST=n). - . Avoid overhead of indirect call via function pointers. - . Contain the changes under arch/x86/kvm/vmx directory and share logic +Several points to be considered: + + * No or minimal overhead when TDX is disabled(CONFIG_INTEL_TDX_HOST=n). + * Avoid overhead of indirect call via function pointers. + * Contain the changes under arch/x86/kvm/vmx directory and share logic with VMX for maintenance. Even though the ways to operation on VM (VMX instruction vs TDX SEAM call) is different, the basic idea remains same. So, many logic can be shared. - . Future maintenance + * Future maintenance The huge change of kvm_x86_ops in (near) future isn't expected. a centralized file is acceptable. @@ -295,21 +296,23 @@ One bit of GPA (51 or 47 bit) is repurposed so that it means shared with host(if set to 1) or private to TD(if cleared to 0). - The current implementation - . Reuse the existing MMU code with minimal update. Because the + + * Reuse the existing MMU code with minimal update. Because the execution flow is mostly same. But additional operation, TDX call for S-EPT, is needed. So add hooks for it to kvm_x86_ops. - . For performance, minimize TDX SEAM call to operate on S-EPT. When + * For performance, minimize TDX SEAM call to operate on S-EPT. When getting corresponding S-EPT pages/entry from faulting GPA, don't use TDX SEAM call to read S-EPT entry. Instead create shadow copy in host memory. Repurpose the existing kvm_mmu_page as shadow copy of S-EPT and associate S-EPT to it. - . Treats share bit as attributes. mask/unmask the bit where + * Treats share bit as attributes. mask/unmask the bit where necessary to keep the existing traversing code works. Introduce kvm.arch.gfn_shared_mask and use "if (gfn_share_mask)" for special case. - = 0 : for non-TDX case - = 51 or 47 bit set for TDX case. + + * 0 : for non-TDX case + * 51 or 47 bit set for TDX case. Pros: -- An old man doll... just what I always wanted! - Clara