[PATCH v2 0/7] KVM: x86: Intel PERF_CAPABILITIES fixes and cleanups

Sean Christopherson
2022-08-03T19:27:08Z

Bug fixes and cleanups related to KVM's handling of PERF_CAPABILITIES.

Bug #1 - Refresh KVM's vPMU after userspace writes PERF_CAPABILITIES, and
then leverage that fix to avoiding checking guest_cpuid_has(X86_FEATURE_PDCM)
during VM-Enter, which is slow enough that it shows up in perf traces[*].

Bug #2 - Don't advertise PMU_CAP_LBR_FMT to userspace if perf has disabled
LBRs, e.g. because probing one or more LBR MSRs during setup hit a #GP.

The non-KVM patches remove unnecessary stubs and unreachable error paths,
which allows for a cleaner fix for bug #2.

[*] https://gist.github.com/avagin/f50a6d569440c9ae382281448c187f4e

v2:
- Add patches to fix bug #2. [Like]
- Add a patch to clean up the capability check.
- Tweak the changelog for the PMU refresh bug fix to call out that
KVM should disallow changing feature MSRs after KVM_RUN. [Like]

v1: https://lore.kernel.org/all/20220727233424.2968356-1-seanjc@google.com

Sean Christopherson (7):
KVM: x86: Refresh PMU after writes to MSR_IA32_PERF_CAPABILITIES
perf/x86/core: Remove unnecessary stubs provided for KVM-only helpers
perf/x86/core: Drop the unnecessary return value from
x86_perf_get_lbr()
KVM: VMX: Advertise PMU LBRs if and only if perf supports LBRs
KVM: VMX: Use proper type-safe functions for vCPU => LBRs helpers
KVM: VMX: Adjust number of LBR records for PERF_CAPABILITIES at
refresh
KVM: VMX: Simplify capability check when handling PERF_CAPABILITIES
write

arch/x86/events/intel/lbr.c | 6 +---
arch/x86/include/asm/perf_event.h | 55 ++++++++-----------------------
arch/x86/kvm/vmx/capabilities.h | 5 ++-
arch/x86/kvm/vmx/pmu_intel.c | 12 ++-----
arch/x86/kvm/vmx/vmx.c | 6 ++--
arch/x86/kvm/vmx/vmx.h | 53 +++++++++++++++++------------
arch/x86/kvm/x86.c | 4 +--
7 files changed, 58 insertions(+), 83 deletions(-)

base-commit: 93472b79715378a2386598d6632c654a2223267b
--
2.37.1.559.g78731f0fdb-goog